Volume 3: General-Purpose and System Instructions - Stanford ...

More documents

Recommendations

Info

AMD64 Technology 24594 Rev. 3.10 February 2005MOVSXDMove with Sign-Extend DoublewordCopies the 32-bit value in a register or memory location (second operand) into a 64-bitregister (first operand), extending the most significant bit of the 32-bit value into allhigher bits of the 64-bit register.This instruction requires the REX prefix 64-bit operand size bit (REX.W) to be set to 1to sign-extend a 32-bit source operand to a 64-bit result. Without the REX operandsizeprefix, the operand size will be 32 bits, the default for 64-bit mode, and the sourceis zero-extended into a 64-bit register. With a 16-bit operand size, only 16 bits arecopied, without modifying the upper 48 bits in the destination.This instruction is available only in 64-bit mode. In legacy or compatibility mode thisopcode is interpreted as ARPL.Mnemonic Opcode DescriptionMOVSXD reg64, reg/mem32 63 /rMove the contents of a 32-bit register or memory operand to a64-bit register with sign extension.Related InstructionsMOVSX, MOVZXrFLAGS AffectedNoneExceptionsException RealVirtual8086 Protected Cause of ExceptionStack, #SS X A memory address was non-canonical.General protection,X A memory address was non-canonical.#GPPage fault, #PF X A page fault resulted from the execution of the instruction.Alignment check, #AC X An unaligned memory reference was performed while alignmentchecking was enabled.208 MOVSXD
24594 Rev. 3.10 February 2005 AMD64 TechnologyMOVZXMove with Zero-ExtensionCopies the value in a register or memory location (second operand) into a register(first operand), zero-extending the value to fit in the destination register. Theoperand-size attribute determines the size of the zero-extended value.Mnemonic Opcode DescriptionMOVZX reg16, reg/mem8 0F B6 /rMOVZX reg32, reg/mem8 0F B6 /rMOVZX reg64, reg/mem8 0F B6 /rMOVZX reg32, reg/mem16 0F B7 /rMOVZX reg64, reg/mem16 0F B7 /rMove the contents of an 8-bit register or memory operand to a16-bit register with zero-extension.Move the contents of an 8-bit register or memory operand to a32-bit register with zero-extension.Move the contents of an 8-bit register or memory operand to a64-bit register with zero-extension.Move the contents of a 16-bit register or memory operand to a32-bit register with zero-extension.Move the contents of a 16-bit register or memory operand to a64-bit register with zero-extension.Related InstructionsMOVSXD, MOVSXrFLAGS AffectedNoneExceptionsException RealVirtual8086 Protected Cause of ExceptionStack, #SS X X X A memory address exceeded the stack segment limit or was noncanonical.General protection,#GPX X XA memory address exceeded a data segment limit or was non-canonical.X A null data segment was used to reference memory.Page fault, #PF X X A page fault resulted from the execution of the instruction.Alignment check, #AC X X An unaligned memory reference was performed while alignmentchecking was enabled.MOVZX 209
Page 2 and 3:
© 2002, 2003, 2004, 2005 Advanced
Page 4 and 5:
AMD64 Technology 24594 Rev. 3.10 Fe
Page 6 and 7:
Page 8:
Page 12 and 13:
Page 14 and 15:
AMD64 Technology 24594—Rev. 3.10
Page 16 and 17:
Page 18 and 19:
Page 20 and 21:
Page 22 and 23:
Page 24 and 25:
Page 26 and 27:
Page 28 and 29:
Page 30 and 31:
Page 32 and 33:
Page 34 and 35:
Page 36 and 37:
Page 38 and 39:
Page 40 and 41:
Page 42 and 43:
Page 44 and 45:
Page 46 and 47:
Page 48 and 49:
Page 50 and 51:
Page 52 and 53:
Page 54 and 55:
Page 56 and 57:
Page 58 and 59:
Page 60 and 61:
Page 62 and 63:
Page 64 and 65:
Page 66 and 67:
Page 68 and 69:
Page 70 and 71:
Page 72 and 73:
Page 74 and 75:
Page 76 and 77:
Page 78 and 79:
Page 80 and 81:
Page 82 and 83:
Page 84 and 85:
Page 86 and 87:
Page 88 and 89:
Page 90 and 91:
Page 92 and 93:
Page 94 and 95:
Page 96 and 97:
Page 98 and 99:
Page 100 and 101:
Page 102 and 103:
Page 104 and 105:
Page 106 and 107:
Page 108 and 109:
Page 110 and 111:
Page 112 and 113:
Page 114 and 115:
Page 116 and 117:
Page 118 and 119:
Page 120 and 121:
Page 122 and 123:
Page 124 and 125:
Page 126 and 127:
Page 128 and 129:
Page 130 and 131:
Page 132 and 133:
Page 134 and 135:
Page 136 and 137:
Page 138 and 139:
Page 140 and 141:
Page 142 and 143:
Page 144 and 145:
Page 146 and 147:
Page 148 and 149:
Page 150 and 151:
Page 152 and 153:
Page 154 and 155:
Page 156 and 157:
Page 158 and 159:
Page 160 and 161:
Page 162 and 163:
Page 164 and 165:
Page 166 and 167:
Page 168 and 169:
Page 170 and 171:
Page 172 and 173:
Page 174 and 175:
Page 176 and 177:
Page 178 and 179:
Page 180 and 181:
Page 182 and 183:
Page 184 and 185:
Page 186 and 187:
Page 188 and 189: AMD64 Technology 24594 Rev. 3.10 Fe
Page 288 and 289:
Page 290 and 291:
Page 292 and 293:
Page 294 and 295:
Page 296 and 297:
Page 298 and 299:
Page 300 and 301:
Page 302 and 303:
Page 304 and 305:
Page 306 and 307:
Page 308 and 309:
Page 310 and 311:
Page 312 and 313:
Page 314 and 315:
Page 316 and 317:
Page 318 and 319:
Page 320 and 321:
Page 322 and 323:
Page 324 and 325:
Page 326 and 327:
Page 328 and 329:
Page 330 and 331:
Page 332 and 333:
Page 334 and 335:
Page 336 and 337:
Page 338 and 339:
Page 340 and 341:
Page 342 and 343:
Page 344 and 345:
Page 346 and 347:
Page 348 and 349:
Page 350 and 351:
Page 352 and 353:
Page 354 and 355:
Page 356 and 357:
Page 358 and 359:
Page 360 and 361:
Page 362 and 363:
Page 364 and 365:
Page 366 and 367:
Page 368 and 369:
Page 370 and 371:
Page 372 and 373:
Page 374 and 375:
Page 376 and 377:
Page 378 and 379:
Page 380 and 381:
Page 382 and 383:
Page 384 and 385:
Page 386 and 387:
Page 388 and 389:
Page 390 and 391:
Page 392 and 393:
Page 394 and 395:
Page 396 and 397:
Page 398 and 399:
Page 400 and 401:
Page 402 and 403:
Page 404 and 405:
Page 406 and 407:
Page 408 and 409:
Page 410 and 411:
Page 412 and 413:
Page 414 and 415:
Page 416 and 417:
Page 418 and 419:
Page 420 and 421:
Page 422 and 423:
Page 424 and 425:
Page 426 and 427:
Page 428 and 429:
Page 430 and 431:
Page 432 and 433:
Page 434 and 435:
Page 436 and 437:
Page 438 and 439:
Page 440 and 441:
Page 442 and 443:
Page 444 and 445:
Page 446 and 447:
Page 448 and 449:
Page 450 and 451:
Page 452 and 453:
Page 454 and 455:
Page 456 and 457:
Page 458 and 459:
Page 460 and 461:
Page 462 and 463:
Page 464 and 465:
Page 466 and 467:
Page 468 and 469:
Page 470 and 471:
Page 472 and 473:
Page 474 and 475:
Page 476 and 477:
Page 478 and 479:
Page 480 and 481:
Page 482 and 483:
Page 484 and 485:
Page 486 and 487:
Page 488 and 489:
Page 490 and 491:
Page 492 and 493:
Page 494 and 495:
Page 496 and 497:
Page 498 and 499:
Page 500 and 501:
Page 502 and 503:
Page 504 and 505:
Page 506 and 507:
Page 508 and 509:
Page 510 and 511:
Page 512 and 513:
Page 514 and 515:
Page 516 and 517:
Page 518 and 519:
Page 520 and 521:
Page 522 and 523:
Page 524 and 525:
Page 526 and 527:
Page 528 and 529:
Page 530 and 531:
Page 532 and 533:
Page 534:
show all

Volume 3: General-Purpose and System Instructions - Stanford ...

Create successful ePaper yourself

Delete template?

Save as template?