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Volume 3: General-Purpose and System Instructions - Stanford ...

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AMD64 Technology 24594 Rev. 3.10 February 2005Mnemonic Opcode DescriptionMOVS mem64, mem64MOVSBMOVSWMOVSDMOVSQRelated <strong>Instructions</strong>MOV, LODSx, STOSxrFLAGS AffectedNoneExceptionsA5A4A5A5A5Move quadword at DS:rSI to ES:rDI, <strong>and</strong> then increment ordecrement rSI <strong>and</strong> rDI.Move byte at DS:rSI to ES:rDI, <strong>and</strong> then increment or decrementrSI <strong>and</strong> rDI.Move word at DS:rSI to ES:rDI, <strong>and</strong> then increment or decrementrSI <strong>and</strong> rDI.Move doubleword at DS:rSI to ES:rDI, <strong>and</strong> then increment ordecrement rSI <strong>and</strong> rDI.Move quadword at DS:rSI to ES:rDI, <strong>and</strong> then increment ordecrement rSI <strong>and</strong> rDI.Exception RealVirtual8086 Protected Cause of ExceptionStack, #SS X X X A memory address exceeded the stack segment limit or was noncanonical.<strong>General</strong> protection,#GPX X XA memory address exceeded a data segment limit or was non-canonical.XThe destination oper<strong>and</strong> was in a non-writable segment.X A null data segment was used to reference memory.Page fault, #PF X X A page fault resulted from the execution of the instruction.Alignment check, #AC X X An unaligned memory reference was performed while alignmentchecking was enabled.206 MOVSx

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