Volume 3: General-Purpose and System Instructions - Stanford ...
Volume 3: General-Purpose and System Instructions - Stanford ... Volume 3: General-Purpose and System Instructions - Stanford ...
AMD64 Technology 24594 Rev. 3.10 February 2005Mnemonic Opcode DescriptionMOV reg64, imm64 B8 +rq Move an 64-bit immediate value into a 64-bit register.MOV reg/mem8, imm8 C6 /0MOV reg/mem16, imm16 C7 /0MOV reg/mem32, imm32 C7 /0MOV reg/mem64, imm32 C7 /0Move an 8-bit immediate value to an 8-bit register or memoryoperand.Move a 16-bit immediate value to a 16-bit register or memoryoperand.Move a 32-bit immediate value to a 32-bit register or memoryoperand.Move a 32-bit signed immediate value to a 64-bit register ormemory operand.Related InstructionsMOV(CRn), MOV(DRn), MOVD, MOVSX, MOVZX, MOVSXD, MOVSxrFLAGS AffectedNoneExceptionsVirtualException Real 8086 Protected Cause of ExceptionInvalid opcode, #UD X X X An attempt was made to load the CS register.Segment not present,#NP (selector)XThe DS, ES, FS, or GS register was loaded with a non-null segmentselector and the segment was marked not present.Stack, #SS X X X A memory address exceeded the stack segment limit or was noncanonical.Stack, #SS(selector)General protection,#GPXX X XThe SS register was loaded with a non-null segment selector, and thesegment was marked not present.A memory address exceeded a data segment limit or was noncanonical.XXThe destination operand was in a non-writable segment.A null data segment was used to reference memory.194 MOV
24594 Rev. 3.10 February 2005 AMD64 TechnologyExceptionGeneral protection,#GP(selector)RealVirtual8086 Protected Cause of ExceptionXXA segment register was loaded, but the segment descriptor exceededthe descriptor table limit.A segment register was loaded and the segment selector’s TI bit wasset, but the LDT selector was a null selector.XXXXThe SS register was loaded with a null segment selector in non-64-bitmode or while CPL = 3.The SS register was loaded and the segment selector RPL and thesegment descriptor DPL were not equal to the CPL.The SS register was loaded and the segment pointed to was not awritable data segment.The DS, ES, FS, or GS register was loaded and the segment pointedto was a data or non-conforming code segment, but the RPL or CPLwas greater than the DPL.X The DS, ES, FS, or GS register was loaded and the segment pointedto was not a data segment or readable code segment.Page fault, #PF X X A page fault resulted from the execution of the instruction.Alignment check, #AC X X An unaligned memory reference was performed while alignmentchecking was enabled.MOV 195
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AMD64 Technology 24594 Rev. 3.10 February 2005Mnemonic Opcode DescriptionMOV reg64, imm64 B8 +rq Move an 64-bit immediate value into a 64-bit register.MOV reg/mem8, imm8 C6 /0MOV reg/mem16, imm16 C7 /0MOV reg/mem32, imm32 C7 /0MOV reg/mem64, imm32 C7 /0Move an 8-bit immediate value to an 8-bit register or memoryoper<strong>and</strong>.Move a 16-bit immediate value to a 16-bit register or memoryoper<strong>and</strong>.Move a 32-bit immediate value to a 32-bit register or memoryoper<strong>and</strong>.Move a 32-bit signed immediate value to a 64-bit register ormemory oper<strong>and</strong>.Related <strong>Instructions</strong>MOV(CRn), MOV(DRn), MOVD, MOVSX, MOVZX, MOVSXD, MOVSxrFLAGS AffectedNoneExceptionsVirtualException Real 8086 Protected Cause of ExceptionInvalid opcode, #UD X X X An attempt was made to load the CS register.Segment not present,#NP (selector)XThe DS, ES, FS, or GS register was loaded with a non-null segmentselector <strong>and</strong> the segment was marked not present.Stack, #SS X X X A memory address exceeded the stack segment limit or was noncanonical.Stack, #SS(selector)<strong>General</strong> protection,#GPXX X XThe SS register was loaded with a non-null segment selector, <strong>and</strong> thesegment was marked not present.A memory address exceeded a data segment limit or was noncanonical.XXThe destination oper<strong>and</strong> was in a non-writable segment.A null data segment was used to reference memory.194 MOV
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