Volume 3: General-Purpose and System Instructions - Stanford ...

24594 Rev. 3.10 February 2005 AMD64 TechnologyDS:rSIThe contents of a memory location whose segment address isin the DS register and whose offset relative to that segmentis in the rSI register.EFER.LME = 0Notation indicating that the LME bit of the EFER registerhas a value of 0.effective address sizeThe address size for the current instruction after accountingfor the default address size and any address-size overrideprefix.effective operand sizeThe operand size for the current instruction afteraccounting for the default operand size and any operandsizeoverride prefix.elementSee vector.exceptionAn abnormal condition that occurs as the result of executingan instruction. The processor’s response to an exceptiondepends on the type of the exception. For all exceptionsexcept 128-bit media SIMD floating-point exceptions andx87 floating-point exceptions, control is transferred to thehandler (or service routine) for that exception, as defined bythe exception’s vector. For floating-point exceptions definedby the IEEE 754 standard, there are both masked andunmasked responses. When unmasked, the exceptionhandler is called, and when masked, a default response isprovided instead of calling the handler.FF /0Notation indicating that FF is the first byte of an opcode,and a subopcode in the ModR/M byte has a value of 0.flushAn often ambiguous term meaning (1) writeback, ifmodified, and invalidate, as in “flush the cache line,” or (2)invalidate, as in “flush the pipeline,” or (3) change a value,as in “flush to zero.”Prefacexix