Volume 3: General-Purpose and System Instructions - Stanford ...
Volume 3: General-Purpose and System Instructions - Stanford ... Volume 3: General-Purpose and System Instructions - Stanford ...
AMD64 Technology 24594 Rev. 3.10 February 2005{IF (temp_idt_desc.ist!=0)// In long mode, if the IDT gate specifies an IST pointer,// a stack-switch is always doneRSP = READ_MEM.q [tss:ist_index*8+28]RSP = RSP AND 0xFFFFFFFFFFFFFFF0// In long mode, interrupts/exceptions align RSP to a// 16-byte boundary}PUSH.q old_SSPUSH.q old_RSP// In long mode, SS:RSP is always pushed to the stackPUSH.v old_RFLAGSPUSH.v old_CSPUSH.v next_RIPIF ((64BIT_MODE) && (temp_RIP is non-canonical)|| (!64BIT_MODE) && (temp_RIP > CS.limit))EXCEPTION [#GP(0)]RFLAGS.VM,NT,TF,RF clearedRFLAGS.IF cleared if interrupt gateRIP = temp_RIPEXIT}ELSE // (CPL > temp_CPL), changing privilege level{CPL = temp_CPLtemp_SS_desc:temp_RSP = READ_INNER_LEVEL_STACK_POINTER(CPL, temp_idt_desc.ist)IF (LONG_MODE)temp_RSP = temp_RSP AND 0xFFFFFFFFFFFFFFF0// in long mode, interrupts/exceptions align rsp// to a 16-byte boundaryRSP.q = temp_RSPSS = temp_SS_descPUSH.v old_SS // #SS on the following pushes uses SS.sel as error codePUSH.v old_RSPPUSH.v old_RFLAGSPUSH.v old_CSPUSH.v next_RIPIF ((64BIT_MODE) && (temp_RIP is non-canonical)|| (!64BIT_MODE) && (temp_RIP > CS.limit))158 INT
24594 Rev. 3.10 February 2005 AMD64 TechnologyEXCEPTION [#GP(0)]}RFLAGS.VM,NT,TF,RF clearedRFLAGS.IF cleared if interrupt gateRIP = temp_RIPEXITINT_N_VIRTUAL:temp_int_n_vector = byte-sized interrupt vector specified in the instruction,zero-extended to 64 bitsIF (CR4.VME=0)// vme isn’t enabled{IF (RFLAGS.IOPL=3)INT_N_VIRTUAL_TO_PROTECTEDELSEEXCEPTION [#GP(0)]}temp_IRB_BASE = READ_MEM.w [tss:102] - 32// check the vme Int-n Redirection Bitmap (IRB), to see// if we should redirect this interrupt to a virtual-mode// handlertemp_VME_REDIRECTION_BIT = READ_BIT_ARRAY ([tss:temp_IRB_BASE],temp_int_n_vector)IF (temp_VME_REDIRECTION_BIT=1){ // the virtual-mode int-n bitmap bit is set, so don’t// redirect this interruptIF (RFLAGS.IOPL=3)INT_N_VIRTUAL_TO_PROTECTEDELSEEXCEPTION [#GP(0)]}ELSE// redirect interrupt through virtual-mode idt{temp_RIP = READ_MEM.w [0:temp_int_n_vector*4]// read target CS:RIP from the virtual-mode idt at// linear address 0temp_CS = READ_MEM.w [0:temp_int_n_vector*4+2]IF (RFLAGS.IOPL < 3)old_RFLAGS = old_RFLAGS with VIF bit shifted into IF bit, and IOPL = 3PUSH.w old_RFLAGSPUSH.w old_CSPUSH.w next_RIPINT 159
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AMD64 Technology 24594 Rev. 3.10 February 2005{IF (temp_idt_desc.ist!=0)// In long mode, if the IDT gate specifies an IST pointer,// a stack-switch is always doneRSP = READ_MEM.q [tss:ist_index*8+28]RSP = RSP AND 0xFFFFFFFFFFFFFFF0// In long mode, interrupts/exceptions align RSP to a// 16-byte boundary}PUSH.q old_SSPUSH.q old_RSP// In long mode, SS:RSP is always pushed to the stackPUSH.v old_RFLAGSPUSH.v old_CSPUSH.v next_RIPIF ((64BIT_MODE) && (temp_RIP is non-canonical)|| (!64BIT_MODE) && (temp_RIP > CS.limit))EXCEPTION [#GP(0)]RFLAGS.VM,NT,TF,RF clearedRFLAGS.IF cleared if interrupt gateRIP = temp_RIPEXIT}ELSE // (CPL > temp_CPL), changing privilege level{CPL = temp_CPLtemp_SS_desc:temp_RSP = READ_INNER_LEVEL_STACK_POINTER(CPL, temp_idt_desc.ist)IF (LONG_MODE)temp_RSP = temp_RSP AND 0xFFFFFFFFFFFFFFF0// in long mode, interrupts/exceptions align rsp// to a 16-byte boundaryRSP.q = temp_RSPSS = temp_SS_descPUSH.v old_SS // #SS on the following pushes uses SS.sel as error codePUSH.v old_RSPPUSH.v old_RFLAGSPUSH.v old_CSPUSH.v next_RIPIF ((64BIT_MODE) && (temp_RIP is non-canonical)|| (!64BIT_MODE) && (temp_RIP > CS.limit))158 INT
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