Volume 3: General-Purpose and System Instructions - Stanford ...

AMD64 Technology 24594 Rev. 3.10 February 2005compatibility modeA submode of long mode. In compatibility mode, the defaultaddress size is 32 bits, and legacy 16-bit and 32-bitapplications run without modification.commitTo irreversibly write, in program order, an instruction’sresult to software-visible storage, such as a register(including flags), the data cache, an internal write buffer, ormemory.CPLCurrent privilege level.CR0–CR4A register range, from register CR0 through CR4, inclusive,with the low-order register first.CR0.PE = 1Notation indicating that the PE bit of the CR0 register has avalue of 1.directReferencing a memory location whose address is included inthe instruction’s syntax as an immediate operand. Theaddress may be an absolute or relative address. Compareindirect.dirty dataData held in the processor’s caches or internal buffers that ismore recent than the copy held in main memory.displacementA signed value that is added to the base of a segment(absolute addressing) or an instruction pointer (relativeaddressing). Same as offset.doublewordTwo words, or four bytes, or 32 bits.double quadwordEight words, or 16 bytes, or 128 bits. Also called octword.xviiiPreface