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AMD64 Technology 24594 Rev. 3.10 February 2005IMULSigned MultiplyMultiplies two signed operands. The number of operands determines the form of theinstruction.If a single operand is specified, the instruction multiplies the value in the specifiedgeneral-purpose register or memory location by the value in the AL, AX, EAX, or RAXregister (depending on the operand size) and stores the product in AX, DX:AX,EDX:EAX, or RDX:RAX, respectively.If two operands are specified, the instruction multiplies the value in a generalpurposeregister (first operand) by an immediate value or the value in a generalpurposeregister or memory location (second operand) and stores the product in thefirst operand location.If three operands are specified, the instruction multiplies the value in a generalpurposeregister or memory location (second operand), by an immediate value (thirdoperand) and stores the product in a register (first operand).The IMUL instruction sign-extends an immediate operand to the length of the otherregister/memory operand.The CF and OF flags are set if, due to integer overflow, the double-widthmultiplication result cannot be represented in the half-width destination register.Otherwise the CF and OF flags are cleared.Mnemonic Opcode DescriptionIMUL reg/mem8 F6 /5IMUL reg/mem16 F7 /5IMUL reg/mem32 F7 /5IMUL reg/mem64 F7 /5IMUL reg16, reg/mem16 0F AF /rMultiply the contents of AL by the contents of an 8-bit memoryor register operand and put the signed result in AX.Multiply the contents of AX by the contents of a 16-bit memory orregister operand and put the signed result in DX:AX.Multiply the contents of EAX by the contents of a 32-bit memoryor register operand and put the signed result in EDX:EAX.Multiply the contents of RAX by the contents of a 64-bit memoryor register operand and put the signed result in RDX:RAX.Multiply the contents of a 16-bit destination register by thecontents of a 16-bit register or memory operand and put thesigned result in the 16-bit destination register.146 IMUL
24594 Rev. 3.10 February 2005 AMD64 TechnologyMnemonic Opcode DescriptionIMUL reg32, reg/mem32 0F AF /rIMUL reg64, reg/mem64 0F AF /rMultiply the contents of a 32-bit destination register by thecontents of a 32-bit register or memory operand and put thesigned result in the 32-bit destination register.Multiply the contents of a 64-bit destination register by thecontents of a 64-bit register or memory operand and put thesigned result in the 64-bit destination register.IMUL reg16, reg/mem16, imm8IMUL reg32, reg/mem32, imm8IMUL reg64, reg/mem64, imm8IMUL reg16, reg/mem16, imm16IMUL reg32, reg/mem32, imm32IMUL reg64, reg/mem64, imm32Related InstructionsIDIV6B /r ib6B /r ib6B /r ib69 /r iw69 /r id69 /r idMultiply the contents of a 16-bit register or memory operand by asign-extended immediate byte and put the signed result in the16-bit destination register.Multiply the contents of a 32-bit register or memory operand bya sign-extended immediate byte and put the signed result in the32-bit destination register.Multiply the contents of a 64-bit register or memory operand bya sign-extended immediate byte and put the signed result in the64-bit destination register.Multiply the contents of a 16-bit register or memory operand by asign-extended immediate word and put the signed result in the16-bit destination register.Multiply the contents of a 32-bit register or memory operand bya sign-extended immediate double and put the signed result inthe 32-bit destination register.Multiply the contents of a 64-bit register or memory operand bya sign-extended immediate double and put the signed result inthe 64-bit destination register.IMUL 147
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