Volume 3: General-Purpose and System Instructions - Stanford ...
Volume 3: General-Purpose and System Instructions - Stanford ... Volume 3: General-Purpose and System Instructions - Stanford ...
AMD64 Technology 24594 Rev. 3.10 February 2005Table 3-2.Effective Family ComputationFamily Field How to Compute the Effective Family ExampleExtended FamilyFhAdd the extended family field and the zeroextendedfamily field.+07000Effective Family0Family13011100100700100010513-329.epsFamilyLess than FhUse the family field as the effective family.031100Effective Family031100513-330.epsThe method for computing the effective model is shown in Table 3-3 on page 121.120 CPUID
24594 Rev. 3.10 February 2005 AMD64 TechnologyTable 3-3.Effective Model ComputationFamily Field How to Compute the Effective Model ExampleExtended ModelFhShift the extended model field four bits to theleft and add it to the model field.+031000Effective ModelModel0031000710000100513-331.epsModelLess than FhUse the model field as the effective model.130100Effective Model130100513-332.epsStandard Function 1 EBX: Initial APIC ID, Logical Processor Count, CLFLUSH Size, and 8-Bit Brand ID.CPUID standard function 1 returns information on the initial value of the physical IDregister associated with the advanced programmable interrupt controller (APIC), thelogical processor count, the size of the cache line flushed by the CLFLUSHinstruction, and the processor brand.Figure 3-2 shows the format of the EBX register following execution of CPUIDstandard function 1.31 24 23 16 15 8 7 0Initial APIC ID Logical Processor Count CLFLUSH Size 8-Bit Brand IDBits Mnemonic Description31–24 Initial APIC ID23–16 Logical Processor Count15–8 CLFLUSH Size7–0 8-Bit Brand IDFigure 3-2.Standard Function 1 EBX: Initial APIC ID, Logical Processor Count, CLFLUSH Size,and 8-Bit Brand ID (EBX Register)CPUID 121
- Page 100 and 101: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 102 and 103: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 104 and 105: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 106 and 107: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 108 and 109: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 110 and 111: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 112 and 113: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 114 and 115: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 116 and 117: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 118 and 119: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 120 and 121: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 122 and 123: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 124 and 125: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 126 and 127: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 128 and 129: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 130 and 131: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 132 and 133: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 134 and 135: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 136 and 137: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 138 and 139: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 140 and 141: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 142 and 143: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 144 and 145: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 146 and 147: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 148 and 149: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 152 and 153: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 154 and 155: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 156 and 157: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 158 and 159: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 160 and 161: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 162 and 163: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 164 and 165: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 166 and 167: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 168 and 169: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 170 and 171: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 172 and 173: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 174 and 175: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 176 and 177: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 178 and 179: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 180 and 181: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 182 and 183: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 184 and 185: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 186 and 187: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 188 and 189: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 190 and 191: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 192 and 193: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 194 and 195: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 196 and 197: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 198 and 199: AMD64 Technology 24594 Rev. 3.10 Fe
24594 Rev. 3.10 February 2005 AMD64 TechnologyTable 3-3.Effective Model ComputationFamily Field How to Compute the Effective Model ExampleExtended ModelFhShift the extended model field four bits to theleft <strong>and</strong> add it to the model field.+031000Effective ModelModel0031000710000100513-331.epsModelLess than FhUse the model field as the effective model.130100Effective Model130100513-332.epsSt<strong>and</strong>ard Function 1 EBX: Initial APIC ID, Logical Processor Count, CLFLUSH Size, <strong>and</strong> 8-Bit Br<strong>and</strong> ID.CPUID st<strong>and</strong>ard function 1 returns information on the initial value of the physical IDregister associated with the advanced programmable interrupt controller (APIC), thelogical processor count, the size of the cache line flushed by the CLFLUSHinstruction, <strong>and</strong> the processor br<strong>and</strong>.Figure 3-2 shows the format of the EBX register following execution of CPUIDst<strong>and</strong>ard function 1.31 24 23 16 15 8 7 0Initial APIC ID Logical Processor Count CLFLUSH Size 8-Bit Br<strong>and</strong> IDBits Mnemonic Description31–24 Initial APIC ID23–16 Logical Processor Count15–8 CLFLUSH Size7–0 8-Bit Br<strong>and</strong> IDFigure 3-2.St<strong>and</strong>ard Function 1 EBX: Initial APIC ID, Logical Processor Count, CLFLUSH Size,<strong>and</strong> 8-Bit Br<strong>and</strong> ID (EBX Register)CPUID 121
Change language