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Volume 3: General-Purpose and System Instructions - Stanford ...

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24594 Rev. 3.10 February 2005 AMD64 TechnologyCMPXCHG8BCMPXCHG16BCompare <strong>and</strong> Exchange Eight BytesCompare <strong>and</strong> Exchange Sixteen BytesCompares the value in the rDX:rAX registers with a 64-bit or 128-bit value in thespecified memory location. If the values are equal, the instruction copies the value inthe rCX:rBX registers to the memory location <strong>and</strong> sets the zero flag (ZF) of therFLAGS register to 1. Otherwise, it copies the value in memory to the rDX:rAXregisters <strong>and</strong> clears ZF to 0.If the effective oper<strong>and</strong> size is 16-bit or 32-bit, the CMPXCHG8B instruction is used.This instruction uses the EDX:EAX <strong>and</strong> ECX:EBX register oper<strong>and</strong>s <strong>and</strong> a 64-bitmemory oper<strong>and</strong>. If the effective oper<strong>and</strong> size is 64-bit, the CMPXCHG16Binstruction is used; this instruction uses RDX:RAX <strong>and</strong> RCX:RBX register oper<strong>and</strong>s<strong>and</strong> a 128-bit memory oper<strong>and</strong>.The CMPXCHG8B <strong>and</strong> CMPXCHG16B instructions support the LOCK prefix. Fordetails about the LOCK prefix, see “Lock Prefix” on page 10.Support for the CMPXCHG8B <strong>and</strong> CMPXCHG16B instructions depends on theprocessor implementation. To find out if a processor can execute the CMPXCHG8Binstruction, use the CPUID instruction to determine whether EDX bit 8 of CPUIDst<strong>and</strong>ard function 1 or extended function 8000_0001h is set to 1. To find out if aprocessor can execute the CMPXCHG16B instruction, use the CPUID instruction todetermine whether ECX bit 13 of CPUID st<strong>and</strong>ard function 1 is set to 1.The memory oper<strong>and</strong> used by CMPXCHG16B must be 16-byte aligned or else ageneral-protection exception is generated.Mnemonic Opcode DescriptionCMPXCHG8B mem64CMPXCHG16B mem128Related <strong>Instructions</strong>CMPXCHG0F C7 /1 m640F C7 /1 m128Compare EDX:EAX register to 64-bit memory location. If equal,set the zero flag (ZF) to 1 <strong>and</strong> copy the ECX:EBX register to thememory location. Otherwise, copy the memory location toEDX:EAX <strong>and</strong> clear the zero flag.Compare RDX:RAX register to 128-bit memory location. If equal,set the zero flag (ZF) to 1 <strong>and</strong> copy the RCX:RBX register to thememory location. Otherwise, copy the memory location toRDX:RAX <strong>and</strong> clear the zero flag.CMPXCHG8/16B 115

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