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Volume 3: General-Purpose and System Instructions - Stanford ...

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24594 Rev. 3.10 February 2005 AMD64 TechnologyMnemonic Opcode DescriptionCMPS mem8, mem8CMPS mem16, mem16CMPS mem32, mem32CMPS mem64, mem64CMPSBCMPSWCMPSDCMPSQRelated <strong>Instructions</strong>CMP, SCASxA6A7A7A7A6A7A7A7Compare the byte at DS:rSI with the byte at ES:rDI <strong>and</strong> thenincrement or decrement rSI <strong>and</strong> rDI.Compare the word at DS:rSI with the word at ES:rDI <strong>and</strong> thenincrement or decrement rSI <strong>and</strong> rDI.Compare the doubleword at DS:rSI with the doubleword atES:rDI <strong>and</strong> then increment or decrement rSI <strong>and</strong> rDI.Compare the quadword at DS:rSI with the quadword at ES:rDI<strong>and</strong> then increment or decrement rSI <strong>and</strong> rDI.Compare the byte at DS:rSI with the byte at ES:rDI <strong>and</strong> thenincrement or decrement rSI <strong>and</strong> rDI.Compare the word at DS:rSI with the word at ES:rDI <strong>and</strong> thenincrement or decrement rSI <strong>and</strong> rDI.Compare the doubleword at DS:rSI with the doubleword atES:rDI <strong>and</strong> then increment or decrement rSI <strong>and</strong> rDI.Compare the quadword at DS:rSI with the quadword at ES:rDI<strong>and</strong> then increment or decrement rSI <strong>and</strong> rDI.CMPSQ 111

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