Volume 3: General-Purpose and System Instructions - Stanford ...
Volume 3: General-Purpose and System Instructions - Stanford ... Volume 3: General-Purpose and System Instructions - Stanford ...
AMD64 Technology 24594 Rev. 3.10 February 2005Mnemonic Opcode DescriptionCMP reg/mem64, imm883 /7 ibCMP reg/mem8, reg8 38 /rCMP reg/mem16, reg16 39 /rCMP reg/mem32, reg32 39 /rCMP reg/mem64, reg64 39 /rCMP reg8, reg/mem8 3A /rCMP reg16, reg/mem16 3B /rCMP reg32, reg/mem32 3B /rCMP reg64, reg/mem64 3B /rCompare an 8-bit signed immediate value with the contents of a64-bit register or memory operand.Compare the contents of an 8-bit register or memory operandwith the contents of an 8-bit register.Compare the contents of a 16-bit register or memory operandwith the contents of a 16-bit register.Compare the contents of a 32-bit register or memory operandwith the contents of a 32-bit register.Compare the contents of a 64-bit register or memory operandwith the contents of a 64-bit register.Compare the contents of an 8-bit register with the contents of an8-bit register or memory operand.Compare the contents of a 16-bit register with the contents of a16-bit register or memory operand.Compare the contents of a 32-bit register with the contents of a32-bit register or memory operand.Compare the contents of a 64-bit register with the contents of a64-bit register or memory operand.When interpreting operands as unsigned, flag settings are as follows:Operands CF ZFdest > source 0 0dest = source 0 1dest < source 1 0When interpreting operands as signed, flag settings are as follows:Operands OF ZFdest > source SF 0dest = source 0 1dest < source NOT SF 0108 CMP
24594 Rev. 3.10 February 2005 AMD64 TechnologyRelated InstructionsSUB, CMPSx, SCASxrFLAGS AffectedID VIP VIF AC VM RF NT IOPL OF DF IF TF SF ZF AF PF CFExceptionsM M M M M M21 20 19 18 17 16 14 13–12 11 10 9 8 7 6 4 2 0Note: Bits 31–22, 15, 5, 3, and 1 are reserved. A flag set to 1 or cleared to 0 is M (modified). Unaffected flags are blank. Undefinedflags are U.Exception RealVirtual8086 Protected Cause of ExceptionStack, #SS X X X A memory address exceeded the stack segment limit or was noncanonical.General protection,#GPX X XA memory address exceeded a data segment limit or was non-canonical.X A null data segment was used to reference memory.Page fault, #PF X X A page fault resulted from the execution of the instruction.Alignment check, #AC X X An unaligned memory reference was performed while alignmentchecking was enabled.CMP 109
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24594 Rev. 3.10 February 2005 AMD64 TechnologyRelated <strong>Instructions</strong>SUB, CMPSx, SCASxrFLAGS AffectedID VIP VIF AC VM RF NT IOPL OF DF IF TF SF ZF AF PF CFExceptionsM M M M M M21 20 19 18 17 16 14 13–12 11 10 9 8 7 6 4 2 0Note: Bits 31–22, 15, 5, 3, <strong>and</strong> 1 are reserved. A flag set to 1 or cleared to 0 is M (modified). Unaffected flags are blank. Undefinedflags are U.Exception RealVirtual8086 Protected Cause of ExceptionStack, #SS X X X A memory address exceeded the stack segment limit or was noncanonical.<strong>General</strong> protection,#GPX X XA memory address exceeded a data segment limit or was non-canonical.X A null data segment was used to reference memory.Page fault, #PF X X A page fault resulted from the execution of the instruction.Alignment check, #AC X X An unaligned memory reference was performed while alignmentchecking was enabled.CMP 109
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