Volume 3: General-Purpose and System Instructions - Stanford ...

Volume 3: General-Purpose and System Instructions - Stanford ... Volume 3: General-Purpose and System Instructions - Stanford ...

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AMD64 Technology 24594 Rev. 3.10 February 2005BSWAPByte SwapReverses the byte order of the specified register. This action converts the contents ofthe register from little endian to big endian or vice versa. In a doubleword, bits 7–0 areexchanged with bits 31–24, and bits 15–8 are exchanged with bits 23–16. In aquadword, bits 7–0 are exchanged with bits 63–56, bits 15–8 with bits 55–48, bits 23–16with bits 47–40, and bits 31–24 with bits 39–32. A subsequent use of the BSWAPinstruction with the same operand restores the original value of the operand.The result of applying the BSWAP instruction to a 16-bit register is undefined. To swapthe bytes of a 16-bit register, use the XCHG instruction and specify the respective bytehalves of the 16-bit register as the two operands. For example, to swap the bytes of AX,use XCHG AL, AH.Mnemonic Opcode DescriptionBSWAP reg32 0F C8 +rd Reverse the byte order of reg32.BSWAP reg64 0F C8 +rq Reverse the byte order of reg64.Related InstructionsXCHGrFLAGS AffectedNoneExceptionsNone78 BSWAP

24594 Rev. 3.10 February 2005 AMD64 TechnologyBTBit TestCopies a bit, specified by a bit index in a register or 8-bit immediate value (secondoperand), from a bit string (first operand), also called the bit base, to the carry flag(CF) of the rFLAGS register.If the bit base operand is a register, the instruction uses the modulo 16, 32, or 64(depending on the operand size) of the bit index to select a bit in the register.If the bit base operand is a memory location, bit 0 of the byte at the specified addressis the bit base of the bit string. If the bit index is in a register, the instruction selects abit position relative to the bit base in the range –2 63 to +2 63 – 1 if the operand size is64, –2 31 to +2 31 – 1, if the operand size is 32, and –2 15 to +2 15 – 1 if the operand size is16. If the bit index is in an immediate value, the bit selected is that value modulo 16,32, or 64, depending on operand size.When the instruction attempts to copy a bit from memory, it accesses 2, 4, or 8 bytesstarting from the specified memory address for 16-bit, 32-bit, or 64-bit operand sizes,respectively, using the following formula:Effective Address + (NumBytes i * (BitOffset DIV NumBits i*8 ))When using this bit addressing mechanism, avoid referencing areas of memory closeto address space holes, such as references to memory-mapped I/O registers. Instead,use a MOV instruction to load a register from such an address and use a register formof the BT instruction to manipulate the data.Mnemonic Opcode DescriptionBT reg/mem16, reg16 0F A3 /r Copy the value of the selected bit to the carry flag.BT reg/mem32, reg32 0F A3 /r Copy the value of the selected bit to the carry flag.BT reg/mem64, reg64 0F A3 /r Copy the value of the selected bit to the carry flag.BT reg/mem16, imm8 0F BA /4 ib Copy the value of the selected bit to the carry flag.BT reg/mem32, imm8 0F BA /4 ib Copy the value of the selected bit to the carry flag.BT reg/mem64, imm8 0F BA /4 ib Copy the value of the selected bit to the carry flag.Related InstructionsBTC, BTR, BTSBT 79

24594 Rev. 3.10 February 2005 AMD64 TechnologyBTBit TestCopies a bit, specified by a bit index in a register or 8-bit immediate value (secondoper<strong>and</strong>), from a bit string (first oper<strong>and</strong>), also called the bit base, to the carry flag(CF) of the rFLAGS register.If the bit base oper<strong>and</strong> is a register, the instruction uses the modulo 16, 32, or 64(depending on the oper<strong>and</strong> size) of the bit index to select a bit in the register.If the bit base oper<strong>and</strong> is a memory location, bit 0 of the byte at the specified addressis the bit base of the bit string. If the bit index is in a register, the instruction selects abit position relative to the bit base in the range –2 63 to +2 63 – 1 if the oper<strong>and</strong> size is64, –2 31 to +2 31 – 1, if the oper<strong>and</strong> size is 32, <strong>and</strong> –2 15 to +2 15 – 1 if the oper<strong>and</strong> size is16. If the bit index is in an immediate value, the bit selected is that value modulo 16,32, or 64, depending on oper<strong>and</strong> size.When the instruction attempts to copy a bit from memory, it accesses 2, 4, or 8 bytesstarting from the specified memory address for 16-bit, 32-bit, or 64-bit oper<strong>and</strong> sizes,respectively, using the following formula:Effective Address + (NumBytes i * (BitOffset DIV NumBits i*8 ))When using this bit addressing mechanism, avoid referencing areas of memory closeto address space holes, such as references to memory-mapped I/O registers. Instead,use a MOV instruction to load a register from such an address <strong>and</strong> use a register formof the BT instruction to manipulate the data.Mnemonic Opcode DescriptionBT reg/mem16, reg16 0F A3 /r Copy the value of the selected bit to the carry flag.BT reg/mem32, reg32 0F A3 /r Copy the value of the selected bit to the carry flag.BT reg/mem64, reg64 0F A3 /r Copy the value of the selected bit to the carry flag.BT reg/mem16, imm8 0F BA /4 ib Copy the value of the selected bit to the carry flag.BT reg/mem32, imm8 0F BA /4 ib Copy the value of the selected bit to the carry flag.BT reg/mem64, imm8 0F BA /4 ib Copy the value of the selected bit to the carry flag.Related <strong>Instructions</strong>BTC, BTR, BTSBT 79

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