Cyclone V SoC FPGA Development Board Reference Manual - Altera

Chapter 2: Board Components 2–21General User Input/OutputUser-Defined DIP SwitchBoard reference SW1 is a eight-pin DIP switch. This switch is user-defined andprovides additional FPGA or HPS input control. When the switch is in the OFFposition, a logic 1 is selected. When the switch is in the ON position, a logic 0 isselected. There are no board-specific functions for this switch.Table 2–13 lists the user-defined DIP switch schematic signal names and theircorresponding Cyclone V SoC pin numbers.Table 2–13. User-Defined DIP Switch Schematic Signal Names and FunctionsBoard ReferenceUser-Defined LEDsSchematicSignal NameCyclone V SoCPin NumberI/O Standard1 USER_DIPSW_HPS0 N30 3.3-V2 USER_DIPSW_HPS1 P29 3.3-V3 USER_DIPSW_HPS2 P22 3.3-V4 USER_DIPSW_HPS3 V20 3.3-V5 USER_DIPSW_FPGA0 AG10 2.5-V6 USER_DIPSW_FPGA1 AH9 2.5-V7 USER_DIPSW_FPGA2 AF11 2.5-V8 USER_DIPSW_FPGA3 AG11 2.5-VBoard references D1–D8 are eight user-defined LEDs. The status and debuggingsignals are driven to the LEDs from the FPGA or HPS designs loaded into theCyclone V SoC. Driving a logic 0 on the I/O port turns the LED on while driving alogic 1 turns the LED off. There are no board-specific functions for these LEDs.Table 2–14 lists the general LED schematic signal names and their correspondingCyclone V SoC pin numbers.Table 2–14. General LED Schematic Signal Names and FunctionsBoard ReferenceSchematicSignal NameCyclone V SoCPin NumberI/O StandardD8 USER_LED_FPGA0 AK2 2.5-VD7 USER_LED_FPGA1 Y16 2.5-VD6 USER_LED_FPGA2 W15 2.5-VD5 USER_LED_FPGA3 AB17 2.5-VD4 USER_LED_HPS0 E17 3.3-VD3 USER_LED_HPS1 E18 3.3-VD2 USER_LED_HPS2 G17 3.3-VD1 USER_LED_HPS3 C18 3.3-VNovember 2013 Altera Corporation Cyclone V SoC Development BoardReference Manual