MODEL DG535 Digital Delay / Pulse Generator - SLAC

+10.000VDC reference is generated on the"bottom" PCB.REAR PANEL OUTPUT DRIVERSThe /02 option provides rear panel outputs forthe T0, A, B, C and D outputs with an amplitudeof 8x the corresponding front panel output. Eachof the five output drivers are the same, thedescription which follows references channelA's output.An ECL level signal indicating the end of delayfor channel A is applied to the base of Q3A. Theamplified pulse is coupled through T1A to thebase of the Darlington pair, Q2A and Q1A. Q1Ais saturated, shorting its collector to its emitter.The relay on the output is shown in the positionfor positive output pulses. When Q1A is turned on,the capacitors C4A and C5A, which were charged to-20 VDC through R9A, are connected to thecapacitors C2A and C3A, which were precharged toa voltage from - 19 to +20 VDC by the op amp 2/2of U1. The output will pulse high from 1 to 40Volts,depending on the precharge of C2A and C3A. Thepulse will last until the core of the transformer,T1A, saturates.The op amp, which precharges C2A and C3A, is alinear differential amplifier, which senses theamplitude current source for the corresponding frontpanel output. The average current output from therear panel outputs is limited by the 1 KΩ chargingresistors, R5A and R6A. These resistors also reducethe amplitude of the outputs by 2 Volts permilliampere of output current.30