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PHASE LOCKED LOOP APPLICATIONSinputs connected in common to a phone line or acousticalcoupler, drive three integrated NOR gate packages. Eachtone decoder is tu ned, by means of R 1 and C1, to one ofthe seven tones. The R2 resistor reduces the bandwidth toabout 8% at 100m V and 5% at 50m V rms. Capacitor C4decouples the seven units. If you are willing to settle for asomewhat slower response at low input voltages (50 to100m V rms), the bandwidth can be controlled in thenormal manner by selecting C2, thereby eliminating theseven R2 resistors and C4. In this case, Ci would be 4.7mfdfor the three lower frequencies and 2.2mfd for the fourhigher frequencies.The only unusual feature of this circuit is the means ofbandwidth reduction using the R2 resistors. As shown inthe 567 data sheet under Alternate Method of BandwidthReduction, an external resistor RA can be used to reducethe loop gain and, therefore, the bandwidth. Resistor R2serves the same function as R A except that instead of goingto a voltage divider for dc bias it goes to a common pointwith the six other R2 resistors. In effect, the five 567swhich are not being activated during the decoding processserve as bias voltage sources for the R2 resistors of the two567s which are being activated. Capacitor C4 (optional)decouples the ac currents at the common point.LOW COST FREQUENCY INDICATOR (567)Figure 8-60 shows how two tone decoders set up withoverlapping detection bands can be used for a go/no-gofrequency meter. Unit 1 is set 6% above the desired sensingfrequency and unit 2 is set 6% below the desired frequency.Now, if the incoming frequency is within 13% of thedesired frequency, either unit 1 or unit 2 will give anoutput. If both units are on, it means that the incomingfrequency is within 1% of the desired frequency. Threelight bulbs and a transistor allow low cost read-out.CRYSTAL-STABI LlZED PHASE LOCKED LOOP (560B)Figure 8-61a shows the 560B connected as a trackingfi Iter for signals near 10M H z. The crystal keeps the freerunningfrequency at the desired value. Figure 8-61 b givesthe lock and capture range as a function of input amplitude.An emitter follower has been added to the normal VCOoutput to prevent pulling the loop off frequency.CIRCUIT DIAGRAM+18FREQUENCY METER WITHLOW-COST LAMP READOUTl-l00mVp-pINPUT U--_-fl------tVCOOUT47lKFigure 8-61aINPUT 0---1100-1000mVrms~0.13fS.I~ 0.13fS-...JI-------~--~~~ ,~--~~--IONFREQUENCY~ FREQUENCYI BOTH UNITS "ON"I AT OVERLAPSENSINGFREQUENCY fsFigure 8-60INPUTAMPLITUDE(mV(p-p))1005040302010LOCK RANGE VS INPUT AMPLITUDE10.004\I\.\ /\ /I1\\/III /I.IIIII1:10.005 10.006 10.007 10.008FREQ. (MHz)Figure 8-61bVII(61
PHASE LOCKED LOOP APPLICATIONSRAMP GENERATORS (566)Figure 8-62 shows how the 566 can be wired as a positiveor negative ramp generator. I n the positive ramp generator,the external transistor driven by the pin 3 output rapidlydischarges C1 at the end of the charging period so thatcharging can resume instantaneously. The pnp transistorlikewise rapidly charges the timing capacitor C1 at the endof the discharge period. Because the circuits are reset soquickly, the temperature stability of the ramp generator isexcellent. The period T is 1/2fo where fo is the 566 freerunningfrequency in normal operation. Therefore,1 RTC1V+7 = - =2fo 5(V+ - V c)where V c is the bias voltage 7 pin 5 and RT is the totalresistance between pin 6 and V+. Note that a short pulse isavailable at pin 3. (Placing collector resistance in serieswith the external transistor collector will lengthen thepulse.)SAWTOOTH AND PULSE GENERATOR (566)Figure 8-63 shows how pin 3 output can be used toprovide different charge and discharge currents for C1 sothat a sawtooth output is available at pin 4 and a pulse atpin 3. The pnp transistor should be well saturated topreserve good temperature stability. The charge anddischarge times may be estimated by using the formulaRTC1V+7 =5(V+ - Vc )where RT is the combined resistance between pin 6 andV+ for the interval considered.v+POSITIVE SAWTOOTH ANDPULSE GENERATORNEGATIVE RAMP GENERATORv+1.5K1.5Kvc10K,....&..--...... I--I--~A/'v SAWTOOTH~PULSEvc10KFigure 8-63aFigure 8-62aPOSITIVE RAMP GENERATORv+NEGATIVE SAWTOOTH ANDPULSE GENERATORv+20K1.5K1.5K5 6 8 4566~TOOTH4.7K10K~LSE22KFigure 8-62bFigure 8-63b62
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TABLE OF CONTENTSSECTION TITLE PAGE
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SECTIONINTRODUCTIONPHASE LOCKED LOO
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USER'S QUICK-LOOK GUIDE TO SIGNETIC
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SECTIONTHE PHASE LOCKED LOOP PRINCI
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