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PHASE LOCKED LOOP APPLICATIONSSIMPLIFIED DIAGRAM OF 567 TONE DECODER CCOV+O-~--,---~------~----____ --________ --__________ ,---~4RSV+-VBE~01COMPARATOR014·018 V1R1(EXT.)VCO OUTPUTt---+------OTO PHASEFEEDBACK DETECTORCOMPARATOR024-028 V2C1(EXT.)02 r--r-+IFLlp·FLOPFigure 8-32The total swing of the capacitor voltage, as determined bythe comparator sensing voltages, isDue to the excellent matching of integrated resistors, theresistor ratio K may be considered constant. Figure 8-33shows the pin 5 and pin 6 voltages during operation. It isobvious from the proportion that t1 + t2 is independent ofthe magnitude of V+ and dependent only on the timeconstant R1C1 of the external components. Moreover, if(V 1 + V2)/2 = V+/2, then t1 = t2 and the duty cycle is50%. Note that the triangular waveform is phase shiftedfrom the square wave. A differential stage (022 and 023)amplifies the triangular wave with respect to (V1 + V2)/2to provide the quadrature output. (Due to the exponentialdistortion of the triangle wave, the quadrature output isactually phase shifted about 80 0 , but no operatingcompromises result from this slight deviation from truequadrature.)--- PINS _____ PINSFigure 8-33One source of error in this oscillator scheme is currentdrawn by the comparators from the R 1 C 1 mode. Anemitter follower, therefore, is inserted at X to minimizethis drain and 021 placed in series with 020 to drop thecomparat~r sensing voltage one Vbe to compensate for theVbe drop in the emitter follower.39
PHASE LOCKED LOOP APPLICATION.SLOOP GAIN CONSTANTS (K o , Kd)Table 8-4 gives the gain constants (K o , Kd) for theSignetics' loops. The values given are for the standardconnection with no gain reduction or tracking adjustmentcomponents connected. The dc amplifier gain A has beenincluded in either the Ko or Kd value, depending on whichside of the low pass filter terminals the gain is present. Thiscauses no hardship in calculations since the loop gain Kvbecomes simply KoKd.5608,5618,5628 565 567Korad.Single-Ended Input0.32 Wo sec-voltto veo3.0w oTotal Supply Voltagerad.rad. Differential Inputrad.O.64w = 0.67 Wo --- at ±6 volts 0.44 Woo sec-volt to veo sec-volt sec-voltKdKdVOLTS/RAD,DKdVOLTSIRAD,KVOLTS.QAD,5 .5DIFFEAENTIAL-./~TORSECONDGROUNDEi/'//, .,DIFFERENTIAL /' VIIL.-_l-L...-.5 I I--/ ./INPUT";;- VVI/.,[7 17.• r-f- INPUT OR SECOND .06 / /SINGLE-ENDED.06r-f- INPUT ACINl'UT./r-r- GROUNDED ./SlNGLE-EYEi r- V// INiT 1/ /.D'/., .D, ./ ///.06 V .L plls,1 TO'.-.006V.006./.. '.D .'D.D' / /V II INPUT.00'50100 MV-RMS ., .. , • .68'- PINS" TO ,.-ic~8~:~L~~ ,'-681-PIN7-TiiLV,'D 110 ,00 1/v1,/6I1-PIN2INPUT riiT- INPUTmV-AMS500 1000 mV-RMSlD 50'00V*The de amplifier gain A has been included in Ko or $d' depending on which side of the LPF terminals the amplifier is located.Table 8-4In order to insure that the square wave drops quickly andaccurately to Vbe, an active clamp scheme is applied tothe collector of 02. The base of 09 is held at 2 V be so thatas 02 is turned on by its base current, its collector is heldat V be. Because 02 and 03 have the same geometry andtheir base-emitter voltages are the same, the maximum02 current when clamped is essentially the same as thecollector current of 03 (as limited by R5). The flip-flopwas optimized for maximum switching speed to reducefrequency drift due to switching speed variations.Current control of the frequency is achieved by makingR21 somewhat less than R24 and restoring the propervoltage for 50% duty cycle by drawing Ic of 100,uA for theR21, 020 junction. When Ic is then varied between 0 and200,uA, the frequency changes by ±7%. Because of theslight shift in the voltage levels V 1 and V 2 with Ic, thesquare wave duty cycle changes from about 47% to about53% over the control range. To avoid drift of centerfrequency with temperature and supply voltage changeswhen Ic =1= 0, Ic is also made a function of V+ - 2Vbe·The CCO circuit is shown in the tone decoder schematicdiagram, Figure 8-34.40
Page 2 and 3: TABLE OF CONTENTSSECTION TITLE PAGE
Page 4: SECTIONINTRODUCTIONPHASE LOCKED LOO
Page 7 and 8: USER'S QUICK-LOOK GUIDE TO SIGNETIC
Page 10: SECTIONTHE PHASE LOCKED LOOP PRINCI
Page 13 and 14: PHASE LOCKED LOOP APPLICATIONSIt is
Page 15 and 16: PHASE LOCKED LOOP APPLICATIONSROOT
Page 17 and 18: PHASE LOCKED LOOP APPLICATIONSINTEG
Page 19 and 20: ~PHASE LOCKED LOOP APPLICATIONSFUNC
Page 21 and 22: PHASE LOCKED LOOP APPLICATIONSFREQU
Page 24 and 25: PHASE LOCKED LOOP APPLICATIONSGENER
Page 26 and 27: PHASE LOCKED LOOP APPLICATIONSPROBA
Page 28 and 29: ~PHASE LOCKED LOOP APPLICATIONSCapt
Page 30 and 31: PHASE LOCKED LOOP APPLICATIONSTRANS
Page 32 and 33: PHASE LOCKED LOOP APPLICATIONSThe V
Page 34 and 35: PHASE LOCKED LOOP APPLICATIONSINTER
Page 36 and 37: PHASE LOCKED LOOP APPLICATIONSIt is
Page 38 and 39: PHASE LOCKED LOOP APPLICATIONSWhen
Page 42 and 43: PHASE LOCKED LOOP APPLICATIONSSCHEM
Page 44 and 45: PHASE LOCKED LOOP APPLICATIONSNARRO
Page 46 and 47: PHASE LOCKED LOOP APPLICATIONSTwo e
Page 48: PHASE LOCKED LOOP APPLICATIONSd.)e.
Page 52 and 53: PHASE LOCKED LOOP APPLICATIONSFM IF
Page 54 and 55: PHASE LOCKED LOOP APPLICATIONSPHASE
Page 56 and 57: PHASE LOCKED LOOP APPLICATIONSTRANS
Page 58 and 59: PHASE LOCKED LOOP APPLICATIONSbaud
Page 60 and 61: PHASE LOCKED LOOP APPLICATIONSFigur
Page 62 and 63: PHASE LOCKED LOOP APPLICATIONSinput
Page 64 and 65: PHASE LOCKED LOOP APPLICATIONfTRIAN
Page 66 and 67: PHASE LOCKED LOOP APPLICATIONSRF-FM
Page 68 and 69: PHASE LOCKED LOOP APPLICATIONSVHF O
Page 70 and 71: PHASE LOCKED LOOP APPLICATIONSPRECI
Page 72 and 73: PHASE LOCKED LOOP APPLICATIONSFSK D
Page 74 and 75: PHASE LOCKED LOOP APPLICATIONSThe c
Page 76 and 77: PHASE LOCKED LOOP APPLICATIONSFLUTT
Page 78 and 79: PHASE LOCKED LOOP APPLICATIONSSALES
Page 80 and 81: PHASE LOCKED LOOP APPLICATIONSINTER

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