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PHASE LOCKED LOOP APPLICATIONSThe VCO is a high frequency emitter-coupled multivibratorformed by transistors Q11-Q14. It operates from aregulated 7.7V supply formed by 6.3V supply formed byZener diode CR 1 (a reverse-biased base-emitter junction) inseries with the 14V regulated supply. The VCO frequencyis thus immune from supply voltage variations. Fourconstant current sources formed by Q20' Q21, Q23, Q24,and biased by CR6 and CR7 supply operating current forthe VCO. Voltage control of the frequency is achieved bya differential amplifier, Q22 and Q25. As the base voltageof Q22 increases with respect to the base voltage of Q25,additional current is supplied to the emitters of Q12 andQ13' increasing the charge and discharge current of thetiming capacitor Co' increasing the VCO frequency.Reducing the base voltage of Q22 with respect to Q25similarly reduces the VCO frequency. Two Zener diodesand two transistors, CR4, CR5, Q5 and Q10, respectively,provide level shifting which allows the VCO to be drivenby the outputs of the phase detector.The phase detector is a doubly-balanced multiplier formedby transistors Q6-Q9, Q17 and Q1S. Signal input is madeto the lower stage, biased at about 4Vby means of 2k.Qbase resistors. The upper stage is biased and driven directlyby the VCO output taken from the collector resistors ofQ12 and Q13· A differential output signal is availablebetween the collectors of Q 6 (and QS) and Q7 (and Q9)·An external network, together with the 6K collectorresistors, comprises the low pass filter. The phase detectoris operated from regulated 14V appearing at the emitterof Q27. A resistor in the collector of Q25 can be shuntedwith an external capacitor to form a de-emphasis filter. Thede-emphasized signal is buffered by emitter follower Q19before being brought out.The TRACK RANGE input, pin 7 on all three loops, allowsthe user to control the total current flowing through thefrequency controlling differential amplifier Q22, Q25. Thisis done by controlling the effective emitter resistance ofQ29' the current source for Q22, Q25. Current may beadded or subtracted at pin 7 to, respectively, reduce orincrease the tracking range.SCHEMATIC DIAGRAM OF 5618VCC@DEMODULATEDSKSK6K 6K .-----+-+----l--o@LOW PASSFILTER~+----+-+---+-1--~-o~CRs.-----+----+----+--+--+--o@ ~::~io ~~~~~~~~TEDl---+--I--+----O@ FM/RF INPUT~O-~---+----~t-----Q @ DE-EMPHASISL-----1--~--4--o4VCR6S.2K3K+---+---'loNv--@OFFSETCONTROL-=- ® MULTIPLIE(QUADRATUREPHASE COMPARATOR)VCOPHASECOMPARATORFigure 8-2031
PHASE LOCKED LOOP APPLICATIONSThe 561, shown in Figure 8-20, contains all of thecircuitry of the 560 and in addition, has a quadraturephase comparator. This enables it to be used as asynchronous AM detector. The quadrature phase detectorconsists of transistors 01-04 and 015, 016 which arebiased and driven in the same manner as the loop phasedetector. However, the quadrature detector input is singleended rather than differential (as the loop phase detectorinput) and an external 90 0 phase shift network is requiredto provide the proper phase relations. The demodulatedAM output is brought out at pin 1.The 562, shown in Figure 8-21, is basically the same asthe 560 except that the loop is broken between the VCOand phase comparator. This allows a counter to beinserted in the loop for frequency multiplication applications.Transistors 01-04 provide low impedance differentialVCO outputs (pins 3 and 4), and the upper stage phasedetector inputs are brought out of the package (pins 2 and15). A bias voltage is brought out through pin 1 to providea convenient bias level for the upper stage of the phasedetector.SCHEMATIC DIAGRAM OF 5628Vcc@...-----I----+--+---o@LOW PASSFILTER~+-------~+-----4---+---r--O~o 0VCOOUTPUTS03 J-4--------+------~all J--~.---4---------4-------+---+---+---0@ i::~io ~~M~~T~~~TED.1----+---1---4-------0 @ FM/RFCR5f-----Q @ DE-EMPHASIS7VB.2KVCO1.2KPHASECOMPARATORFigure 8-2132
Page 2 and 3: TABLE OF CONTENTSSECTION TITLE PAGE
Page 4: SECTIONINTRODUCTIONPHASE LOCKED LOO
Page 7 and 8: USER'S QUICK-LOOK GUIDE TO SIGNETIC
Page 10: SECTIONTHE PHASE LOCKED LOOP PRINCI
Page 13 and 14: PHASE LOCKED LOOP APPLICATIONSIt is
Page 15 and 16: PHASE LOCKED LOOP APPLICATIONSROOT
Page 17 and 18: PHASE LOCKED LOOP APPLICATIONSINTEG
Page 19 and 20: ~PHASE LOCKED LOOP APPLICATIONSFUNC
Page 21 and 22: PHASE LOCKED LOOP APPLICATIONSFREQU
Page 24 and 25: PHASE LOCKED LOOP APPLICATIONSGENER
Page 26 and 27: PHASE LOCKED LOOP APPLICATIONSPROBA
Page 28 and 29: ~PHASE LOCKED LOOP APPLICATIONSCapt
Page 30 and 31: PHASE LOCKED LOOP APPLICATIONSTRANS
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Page 38 and 39: PHASE LOCKED LOOP APPLICATIONSWhen
Page 40 and 41: PHASE LOCKED LOOP APPLICATIONSSIMPL
Page 42 and 43: PHASE LOCKED LOOP APPLICATIONSSCHEM
Page 44 and 45: PHASE LOCKED LOOP APPLICATIONSNARRO
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Page 54 and 55: PHASE LOCKED LOOP APPLICATIONSPHASE
Page 56 and 57: PHASE LOCKED LOOP APPLICATIONSTRANS
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Page 60 and 61: PHASE LOCKED LOOP APPLICATIONSFigur
Page 62 and 63: PHASE LOCKED LOOP APPLICATIONSinput
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Page 66 and 67: PHASE LOCKED LOOP APPLICATIONSRF-FM
Page 68 and 69: PHASE LOCKED LOOP APPLICATIONSVHF O
Page 70 and 71: PHASE LOCKED LOOP APPLICATIONSPRECI
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Page 78 and 79: PHASE LOCKED LOOP APPLICATIONSSALES
Page 80 and 81: PHASE LOCKED LOOP APPLICATIONSINTER

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