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PHASE LOCKED LOOP APPLICATIONSwhere F(jw c ) is the low pass filter amplitude response atw = wL. Note that at all times the capture range is smallerthan the lock range. If the simple lag filter of Figure 8-5bis used, the capture range equation can be approximated asjfv2wcAFL~ 2 - = 2 -71 71Thus, the capture range decreases as the low pass filter timeconstant is decreased, whereas the lock range is unaffectedby the filter and is determined solely by the loop gain.Figure 8-6 shows the typical frequency-to-voltage transfercharacteristics of the PLL. The input is assumed to be a sinewave whose frequency is swept slowly over a broadfrequency range. The vertical scale is the correspondingloop error voltage. In Figure 8-6a, the input frequency isbeing gradually increased. The loop does not respond to thesignal until it reaches a frequency w1, corresponding to thelower edge of the capture range. Then, the loop suddenlylocks on the input and causes a negative jump of the looperror voltage. Next, V d varies with frequency with a slopeequal to the reciprocal of veo gain (1 /Ko) and goesthrough zero as wi = wOo The loop tracks the input untilthe input frequency reaches w2, corresponding to theupper edge of the lock range. The PLL then loses lock andthe error voltage drops to zero. If the input frequency isswept slowly back now, the cycle repeats itself, but it isinverted, as shown in Figure 8-6b. The loop recaptures thesignal at w3 and tracks it down to w4. The total captureand lock ranges of the system are:2wc = w3 - w1 and 2wL = w2 - w4Note that, as indicated by the transfer characteristics ofFigure 8-6, the PLL system has an inherent selectivityabout the center frequency set by the veo free-runningfrequency wo; it will respond only to the input signalfrequencies that are separated from Wo by less than Wc orw L, depending on whether the loop starts with or withoutan initial lock condition. The linearity of the frequency-tovoltageconversion characteristics for the PLL is determinedsolely by the veo conversion gain. Therefore, in most PLLapplications, the veo is required to have a highly linearvoltage-to-frequency transfer characteristic.PHASE LOCKED LOOP BUILDING BLOCKSVOLTAGE CONTROLLED OSCI LLATORSince three different forms of veo have been used in theSignetics PLL series, the veo details will not be discusseduntil the individual loops are described. However, a fewgeneral comments about veos are in order.When the PLL is locked to a signal, the veo voltage is afunction of the frequency of the input signal. Since theveo control voltage is the demodulated output during FMdemodulation, it is important that the veo voltage-tofrequencycharacteristic be linear so that the output is notdistorted. Over the linear range of the veo, the conversiongain is given by Ko (in radian/volt-sec).TYPICAL PLL FREQUENCY-TO-VOL TAGETRANSFER CHARACTERISTICS FORINPUT FREQUENCY INCREASINGAND DECREASINGVd:~ DIREC~SWEEP1-01----1I1 I-- 2WC --IaINCREASINGFREQUENCY+ : INCREASINGP.SWEEPbFREQUENCYVd 0 DIREi~CT-'ON"'OF"':''''r-4 -----*:......-~------ -Since the loop output voltage is the veo voltage, we canget the loop output voltage asThe gain Ko can be found from the data sheet by taking thechange in veo control voltage for a given percentagefrequency deviation and multiplying by the center frequency.When the veo voltage is changed, the frequencychange is virtually instantaneous.PHASE DETECTORFigure 8-6All Signetics phase locked loops use the same form of phasedetector-often called the doubly-balanced multiplier ormixer. Such a circuit is shown in Figure 8-7.15
PHASE LOCKED LOOP APPLICATIONSINTEGRATED PHASE DETECTOR7T00- \ ~ cosL ~2n+1)Wot+Wit+O~(2n + 1) ~ lJn=OFigure 8-7The input stage formed by transistors 01 and 02 may beviewed as a differential amplifier which has a collectorresistance RC and whose differential gain at balance is theratio of RC to the emitter resistance r e of 01 and 02.0.0131eThe switching stage formed by 03 - 06 is switched on andoff by the VCO square wave. Since the collector currentswing of 02 is the negative of the collector current swing of01, the switching action has the effect of multiplying thedifferential stage output first by +1 and then by -1. Thatis, when the base of 04 is positive, RC2 receives 11 andwhen the base of 06 is positive, RC2 receives 12 = -11.Since we have called this a multiplier, let us perform themUltiplication to gain further insight into the action of thephase detector.Suppose we have an input signal which consists of twoadded components: a component at frequency Wi which isclose to the free-running frequency and a component atfrequency wk which may be at any frequency. The inputsignal isVi + Vk = Vi sin (Wit + 0i) + Vk sin (wkt + Ok)where 0i and Ok are the phase in relation to the VCOsignal. The unity square wave developed in the multiplierby the VCO signal is47T(2n + 1)sin [(2n + 1) wot]where Wo is the VCO frequency. Multiplying the twoterms, using the appropriate trigonometric relationship andinserting the differential stage gain Ad, we get00-[n=OAssuming the Vk is zero, temporarily, if Wi is close to w o 'the first term (n = 0) has a low frequency differencefrequency component. This is the beat frequency componentthat feeds around the loop and causes lock up bymodulating the VCO. As Wo is driven closer to Wi, thisdifference component becomes lower and lower in frequencyuntil Wo = Wi and lock is achieved. The first termthen becomes7Twhich is the usual phase detector formula showing the dccomponent of the phase detector during lock. Thiscomponent must equal the voltage necessary to keep theVCO at WOo It is possible for Wo to equal Wi momentarilyduring the lock up process and, yet, for the phase to beincorrect so that Wo passes through Wi without lock beingachieved. This explains why lock is usually not achievedinstantaneously, even when Wi = Wo at t = O.16
Page 2 and 3: TABLE OF CONTENTSSECTION TITLE PAGE
Page 4: SECTIONINTRODUCTIONPHASE LOCKED LOO
Page 7 and 8: USER'S QUICK-LOOK GUIDE TO SIGNETIC
Page 10: SECTIONTHE PHASE LOCKED LOOP PRINCI
Page 13 and 14: PHASE LOCKED LOOP APPLICATIONSIt is
Page 15: PHASE LOCKED LOOP APPLICATIONSROOT
Page 19 and 20: ~PHASE LOCKED LOOP APPLICATIONSFUNC
Page 21 and 22: PHASE LOCKED LOOP APPLICATIONSFREQU
Page 24 and 25: PHASE LOCKED LOOP APPLICATIONSGENER
Page 26 and 27: PHASE LOCKED LOOP APPLICATIONSPROBA
Page 28 and 29: ~PHASE LOCKED LOOP APPLICATIONSCapt
Page 30 and 31: PHASE LOCKED LOOP APPLICATIONSTRANS
Page 32 and 33: PHASE LOCKED LOOP APPLICATIONSThe V
Page 34 and 35: PHASE LOCKED LOOP APPLICATIONSINTER
Page 36 and 37: PHASE LOCKED LOOP APPLICATIONSIt is
Page 38 and 39: PHASE LOCKED LOOP APPLICATIONSWhen
Page 40 and 41: PHASE LOCKED LOOP APPLICATIONSSIMPL
Page 42 and 43: PHASE LOCKED LOOP APPLICATIONSSCHEM
Page 44 and 45: PHASE LOCKED LOOP APPLICATIONSNARRO
Page 46 and 47: PHASE LOCKED LOOP APPLICATIONSTwo e
Page 48: PHASE LOCKED LOOP APPLICATIONSd.)e.
Page 52 and 53: PHASE LOCKED LOOP APPLICATIONSFM IF
Page 54 and 55: PHASE LOCKED LOOP APPLICATIONSPHASE
Page 56 and 57: PHASE LOCKED LOOP APPLICATIONSTRANS
Page 58 and 59: PHASE LOCKED LOOP APPLICATIONSbaud
Page 60 and 61: PHASE LOCKED LOOP APPLICATIONSFigur
Page 62 and 63: PHASE LOCKED LOOP APPLICATIONSinput
Page 64 and 65: PHASE LOCKED LOOP APPLICATIONfTRIAN
Page 66 and 67:
PHASE LOCKED LOOP APPLICATIONSRF-FM
Page 68 and 69:
PHASE LOCKED LOOP APPLICATIONSVHF O
Page 70 and 71:
PHASE LOCKED LOOP APPLICATIONSPRECI
Page 72 and 73:
PHASE LOCKED LOOP APPLICATIONSFSK D
Page 74 and 75:
PHASE LOCKED LOOP APPLICATIONSThe c
Page 76 and 77:
PHASE LOCKED LOOP APPLICATIONSFLUTT
Page 78 and 79:
PHASE LOCKED LOOP APPLICATIONSSALES
Page 80 and 81:
PHASE LOCKED LOOP APPLICATIONSINTER
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