User Manual M3000® Automation System / MSC II (Moog Servo ...

10 MSC II (Moog Servo Controller) Digital Sensor Interfaces
10.13.3.2 SSI Slave Mode
When in SSI slave mode, the MSC II does not generate its own SSI clock; instead,
it reads the data in synchronization with an externally generated clock
signal. The MSC II influences neither the SSI clock frequency nor the update
rate with which new data is requested from the SSI sensor. In this mode, the
MSC II reads the data signal with every falling edge of the clock.
With a symmetrical clock, the sensor interface can evaluate signals in the frequency
range of 78 kHz to 5 MHz.
When the clock signal is asymmetrical, the width of the positive pulse must be
smaller than 6.3 µs so that the sensor interface that is configured as an SSI
slave will not perceive prematurely that the data transmission is concluded.
The clock signal must be in the 1 state for longer than 6.5 µs so that the sensor
interface will save the value that has been read.
CLK
Data
Data Signal
SSI Master SSI Sensor
SSI Clock (CLK)
DGND DGND
Figure 62: Connection Diagram of the MSC II in Slave Mode
Figure 63: Signals Between the MSC II and a 16 Bit SSI Sensor (Example)
The signal levels comply with the standard TIA/EIA 422/485 (previously
RS 422/485).
SSI sensors can be used that supply either gray code or binary coded data.
The maximum possible resolution is 32 bits.
Coding of data and number of data bits can be adjusted in the PLC Configuration
of the MACS development environment.
Ax+
Ax-
Bx+
Bx-
DGND
MSC II
SSI Slave
Mode
MSB D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 LSB
The external SSI master must be capable of driving two TIA/EIA 422/485
inputs (including the termination resistors)!
MSC II in SSI Slave Mode
Connection Diagram of
the MSC II in Slave
Mode
Signals Between the
MSC II and a 16 Bit SSI
Sensor (Example)
© Moog GmbH User Manual M3000 ® and MSC II (CA65865-001; Version 1.1, 08/08) 104