User Manual M3000® Automation System / MSC II (Moog Servo ...

10 MSC II (Moog Servo Controller) Digital Sensor Interfaces
10.13.3.1 SSI Master Mode
In SSI master mode, the MSC II generates the SSI clock internally (sensor 1:
CLK1, sensor 2: CLK2, sensor 3: CLK3,sensor 4: CLK4) with adjustable frequencies
in the range between 78 kHz and 5 MHz. The frequencies are set in
the PLC configuration of the MACS development environment.
The clock signal is generated synchronous to the adjusted basetick. MSC II
calculates duration of a SSI data transmission depending on frequency and
number of data bits. SSI communication is started exact that necessary time
before each basetick.
Make sure That the SSI communication time does not exceed the basetick
period.
When idle, the clock signal will be in the 1 state. The first falling edge of the
clock signal triggers the SSI sensor to hold its actual value. The clock signal's
subsequent rising edge starts the data transmission of the SSI sensor. The
output begins with the most significant bit (MSB). After a complete data set
has been transmitted, the SSI sensor holds the data signal in the 0 state until
the SSI sensor is ready for another transmission. The return of the data signal
to the 1 state simultaneously fulfills the condition the SSI interface needs to
trigger a new read-in cycle.
MSC II
SSI Master
Mode
Ax+
Ax-
CLKx+
CLKx-
DGND
Data Signal
SSI Clock (CLK)
DGND
Figure 61: Connection Diagram of the MSC II in Master Mode
SSI Sensor
MSC II in SSI Master Mode
Connection Diagram of
the MSC II in Master
Mode
© Moog GmbH User Manual M3000 ® and MSC II (CA65865-001; Version 1.1, 08/08) 103