1 - Al Kossow's Bitsavers

TMS416165,536·BIT MUL TIPORT MEMORYtiming requirements over recommended supply voltage range and operating free·air temperature range (continued)PARAMETERALT. TMS4161-15 TMS4161·20SYMBOL MIN MAX MIN MAXth(SO) Serial data out hold time after SCLK high 8 8 nsth(TR) TR/QE hold time after RAS low 20 20 nstRLCH Delay time, RAS low to CAS high tCSH 150 200 nstCHRL Delay time, CAS high to RAS low tCRP a a nstCLQEH Delay time, CAS low to QE high 100 135 nstCLRH Delay time, CAS low to RAS high tRSH 100 135 nstCLWLDelay time, CAS low to W low(read-modify-write cycle only)tCWD60 65nsDelay time, CAS low to QE lowtCQE (maximum value specified only 60 95 nsto guarantee ta(QE) access time)tRHSC Delay time, RAS high to SCLK high' 50 50,000 50 50,000 nstRLCLDelay time, RAS low to CAS low (maximumvalue specified only to guarantee ta(R))tRCD20 50 25 65 nstRLWLtCKRLDelay time, RAS low to W low(read-modify-write cycle only)Delay time, SCLK high beforeRAS low with TR/QE low'tRWD 110 130UNITns10 50,000 10 50,000 nstrf Refresh time interval tREF 4 4 msNOTE: Timing measurements are made at the 10% and 90% points of input and clock transitions. In addition, VIL max and VIH min must be met at the 10%and 90% points., SCLK be high or low during tWIRL)'PARAMETER MEASUREMENT INFORMATIONv = 1.31 V= 217 flOUTPUTUNDER TEST-JRLTCLt/)Q)(.)'SQ)c......oc.C.::len>...oEQ)~"Cc::CO~«ex:(.)'ECOc::>CFIGURE 1 -LOAD CIRCUITTEXASINSTRUMENTSPOST OFFICE BOX 225012 • DALLAS. TEXAS 752654-23