1 - Al Kossow's Bitsavers

RELATIVE MEMORY SIZEARCHIVAL STORAGE(MAGNETIC TAPEI1BULK STORAGE(DISKIINCREASINGCOST PER BITINCREASINGACCESS TIMEFIGURE 1 -MEMORY SIZE VS. ACCESS TIME AND COST PER BITWhen the processor accesses main memory, the processor address is compared to the addresses currently present in thecache tag RAM. In the case where a match occurs, the required data is resident in the cache and the access is called a "hit,"and is completed in the cycle time of the fast memory. If there is no match (a "miss"), the main memory is accessed, and theprocessor must be delayed to allow for the slower access cycle of the main memory. The determination of whether a hit hasoccured is the responsibility of the cache tag RAM. Figure 2 shows the relative placement of the processor, main memory,cache, and cache tag RAM within a system.Since there must be comparisons made between the current processor address and the addresses in the cache, the cachetag RAM must have a very fast accesS time to prevent the degradation of processor accesses even when a match occurs.Previously, the memory used for the cache tag RAM was the same as that used for the cache; which, due to added delaysthrough comparision logic. meant that the full benefits of the cache were not realized.PROCESSOR:/'~DATA BUS"DCACHE BUFFERE4-RAMAr ....,/"ADDRESS BUS ){1. VzDACACHE TAGRAMMI...MAINMEMORYFIGURE 2 -TYPICAL MEMORY SYSTEM WITH CACHE9-86