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1 - Al Kossow's Bitsavers

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4. Row Address Setup and Hold TimesthustAV-AELtAV-AELtc2 + t p('LS04) + t p('S74) - tc2/4 - td3 - tAVQV1(200 + 6 + 4 - 50 - 15 - 70) ns75 ns setup time from CS to ALE starting low.<strong>Al</strong>so,thustsu(AR)tsu(AR)tc2 + t p('LS04) + t p('S74) + tAEL-REL * - tc2/4 - td3 - tAVQV1 -tRAV-MAV(200 + 6 + 4 + 36 - 50 - 15 - 70 - 50) ns61 ns row address setup time for the DRAMs.5. Data Valid to Write EnableSince data is valid before ALE falls, the data setup time is guaranteed.6. Read Access TimeAssuming two wait states are generated for each access cycle:thusta(C)ta(C)2[tc2] - t p('LS04)t - t p('S74)t - tAEL-CEL - tt(CEL) - tsu2t Maximum values are used for propagation delays t p('LS04) and tp ('S74) tosatisfy worst-case design requirements.[2(200) - 15 - 9 - 200 - 20 - 25] ns131 ns read access time from CAS.The previous calculations indicate that RAS precharge and read access requirements will constrain memory selection.TMS4164-25 devices will not be able to meet either the RAS precharge time (tw(RH) = 150 ns) or the read access time(ta(C) = 165 ns). TMS4164-20 devices cannot meet the read access time (ta(C) = 135 ns); however, TMS4164-15 devicesmeet all timing requirements.Now that the 128K word memory using TMS4164s has been analyzed, a brief description of a 64K word memory usingTMS4416s will be given. The major difference between the two memory configurations lies in the addition of a 7 4LS 155used as a one-of-four selector (see Figure 6). The R/W line from the TMS99000 is used to select whether the upcomingaccess is to be a read or write cycle. MSF selects either the left or right bank of memory while MSE selects either the upperor lower bank. Thus, only one of the four banks of 16K word memories will be accessed on any given mefTlory cycle. Becauseall of the inputs to the 74LS155 are set up before the start of each DRAM access (ALE starting lowl. there are no timingconstraints when using TMS4416-20 or TMS4416-15 devices.Two memory system configurations have been presented showing how the TMS4500A can be configured to work withthe TMS99000 16-bit microprocessor. A memory mapping scheme has been provided that is flexible enough to work withmany microcomputer applications using the TMS99000 without modification. <strong>Al</strong>though both expandability and modularityhave been considered in this design, other memory mapping schemes and processor speeds are possible .Mos MemoryApplications Engineeringco";:;CO...E.... o.5enco";:;CO"~Q.c.•

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