1 - Al Kossow's Bitsavers

TMS49648192·WORD BY 8·BIT READ·ONLY MEMORYWhen an address outside the range FEO to FF7 is accessed, address bits A 11 and A 10 select pointer 0, 1 or 2 andthe pointer content is mapped to the internal address bits A 12, A 11 and A 10. When A 10 and A 11 are both high,page 7 is selected (see Table 4). Internal address bits A9 thru AO are the same as the external address bits A9 thru AO.TABLE 4A11 A10 SELECTEDL L Pointer 0L H Pointer 1H L Pointer 2H H Page 7H = high level, L = low levelAs an example, suppose it is desired to select the third 1 K ROM page by addresses 400 thru 7FF. This address spaceis represented by pointer 1 because of the condition of A 11 and A 10. To write to pointer 1; bits A4, A3 = LH. Thecontents of the pointer is 3; bits A2, A 1, AO = LHH. Therefore, location FEB is accessed.functional block diagram51/S1 ---II>--r-------------,52/52 CHIP SELECT LOGIC t--.... -tDATA OUTPUTS01-08OUTPUT BUFFERS-Vcc-VSSU)Q)(.)'S;Q)C~oa:Y GATING8192 X 8 MEMORY MATRIXPAGEPAGESELECTLOGICFEO to FF7TEXASINSTRUMENTSPOST OFFICE BOX 225012 • DALLAS, TEXAS 752657-21