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ARM DS-5 Using the Debug Hardware Configuration Utilities

ARM DS-5 Using the Debug Hardware Configuration Utilities

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Creating debug hardware target configurations5.17.2 Non-processor CoreSight device settingsFor non-processor CoreSight devices, <strong>the</strong> following device configuration settings are available:<strong>ARM</strong>11xx-JTAG-AP specific settingsThe <strong>ARM</strong>1136JFS-JTAG-AP, <strong>ARM</strong>1156T2FS-JTAG-AP, and<strong>ARM</strong>1176JZF-JTAG-AP devices have <strong>the</strong> following CoreSight-specificcontrols:JTAG-AP Port index for coreFor CoreSight systems with processors connected to JTAG-AP, <strong>the</strong>port index on <strong>the</strong> JTAG-AP to which <strong>the</strong> processor is connected.Pre-scan IR bits for Devices after <strong>the</strong> core on <strong>the</strong> JTAG-AP scanchainThe total length of <strong>the</strong> JTAG instruction registers (IRs) for devicesappearing after <strong>the</strong> debugged target processor on <strong>the</strong> scan chain.For example, if <strong>the</strong>re are three devices after <strong>the</strong> processor with IRlengths of 5, 7, and 11, <strong>the</strong>n set this to 23.Post-scan IR bits for Devices before <strong>the</strong> core on <strong>the</strong> JTAG-AP scanchainThe total length of <strong>the</strong> JTAG instruction registers (IRs) for devicesappearing before <strong>the</strong> debugged target processor on <strong>the</strong> scan chain.For example, if <strong>the</strong>re are two devices before <strong>the</strong> processor with IRlengths of 2 and 3, <strong>the</strong>n set this value to 5.Pre-scan DR bits for Devices after <strong>the</strong> core on <strong>the</strong> JTAG-AP scanchainThe total number of devices appearing after <strong>the</strong> debugged targetprocessor on <strong>the</strong> scan chain.For example, if <strong>the</strong>re are three devices after <strong>the</strong> processor, <strong>the</strong>n set thisvalue to 3.Post-scan DR bits for Devices before <strong>the</strong> core on <strong>the</strong> JTAG-AP scanchainThe total number of devices appearing before <strong>the</strong> debugged targetprocessor on <strong>the</strong> scan chain.For example, if <strong>the</strong>re are two devices before <strong>the</strong> processor, <strong>the</strong>n set thisvalue to 2.Fast memory download.This control is available for those targets where <strong>the</strong> <strong>Debug</strong> Access Port(DAP) and <strong>the</strong> processor are running sufficiently fast enough to handle<strong>the</strong> data being sent to <strong>the</strong>m by <strong>the</strong> debug unit. The debug unit does nothave to check that each individual transaction with <strong>the</strong> DAP issuccessful.Because <strong>the</strong> processor is behind <strong>the</strong> DAP, all processor accesses haveto go through <strong>the</strong> DAP. As a guide, do not set this for FPGA-basedtargets, but only for real silicon.If this option is set, <strong>the</strong>n error checking is disabled and <strong>the</strong> user is notinformed of any errors that occur. If problems are encountered whendownloading images <strong>the</strong>n uncheck this option to resolve <strong>the</strong>m.CoreSight AP indexThe AP index of <strong>the</strong> device.Available for all devices, except <strong>the</strong> <strong>ARM</strong>CS-DP, <strong>ARM</strong>JTAG-DP, and<strong>ARM</strong>SW-DP devices.CoreSight base addressThe base address of <strong>the</strong> CoreSight registers for <strong>the</strong> device on <strong>the</strong> AHB or APB.<strong>ARM</strong> DUI 0498F Copyright © 2010-2012 <strong>ARM</strong>. All rights reserved. 5-31ID021112Non-Confidential

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