ARM DS-5 Using the Debug Hardware Configuration Utilities

Creating debug hardware target configurationsIgnore bad JTAG IDCODEBy default, debug hardware reads the device JTAG IDCODE to verify theintegrity of the JTAG connection. The JTAG standard restricts the JTAGIDCODE value to be 32 bits long and requires the least significant bit to be a 1.If debug hardware reads an invalid (bad) JTAG IDCODE, it assumes that theJTAG connection is not functioning properly, and fails the attempt to connect tothe processor.You must set the Ignore bad JTAG IDCODE option according to whether youwant to instruct debug hardware to enable connection to the processor even if itdetects that the JTAG IDCODE is invalid.Ignore debug privilege errors when starting coreWhen the SPIDEN line is changed from HIGH to LOW, the following errorsmight be seen:• Insufficient debug privilege to restore core state for restart.• Insufficient debug privilege to write software breakpoint to memory.• Set Ignore debug privilege errors when starting core to suppress theseerrors.If set to True, debug hardware starts the processor running even though thebreakpoints/processor state is incorrect.If set to False (the default), debug hardware refuses to start the processor andreports the errors.IP Address IP address of the target when using virtual Ethernet. Used with the DefaultGateway and Network Mask settings to enable access to your target from thenetwork.JTAG timeouts enabledJTAG timeouts are enabled by default. You must disable these when debughardware is connected to a processor using a low clock speed and adaptiveclocking, because debug hardware cannot detect the clock speed when adaptiveclocking is used, so cannot scale its internal timeouts. If a JTAG timeout occurs,the JTAG is left in an unknown state, and debug hardware cannot operatecorrectly without reconnecting to the processor.Network MaskNet Mask of the target when using virtual Ethernet. Used with the IP Address andDefault Gateway settings to enable access to your target from the network.No error if step-instr can't stop.Controls generation of error messages if a debugger step instruction operationfails because a timeout attempts to stop the SecurCore processor after a step iscomplete. This can occur on the SecurCore if an instruction execution results inthe processor clock being disabled using CLKEN. The processor appears to be ina running state.If set to True (the default), then no error message appears if an instruction stepresults in the processor running.If set to False, then an error dialog box is displayed in your debugger.Post Reset StateSet to the required state for the target hardware:Running The target hardware is running.ARM DUI 0498F Copyright © 2010-2012 ARM. All rights reserved. 5-28ID021112Non-Confidential