ARM DS-5 Using the Debug Hardware Configuration Utilities

Creating debug hardware target configurations5.17 Debug hardware device configuration settingsYou can configure settings that are specific to a target device on your development platform.The settings available depend on whether the device is a processor or a non-processor CoreSightdevice.5.17.1 Processor device settingsDepending on the processor that you have selected, a selection of the following controls isavailable:Allow execution with T-Bit ClearThe Cortex-M series processors can only execute Thumb2 code. However, theirxPSR contains a bit to configure ARM/Thumb state, that is initialized from thereset vector. This enables you to test the exception handler associated with thisexception type.Bypass memory protection when in debugThis option enables the bypass of any memory protection provided by hardware(such as a memory management or protection unit) whenever the target hardwareenters debug state. This means that you can access protected memory to setsoftware breakpoints in it, or to alter its contents.Clear breakpoint hardware on connectThis control is available if you are using the ARM11 family of processors. Thedebug logic of an ARM11 processor is not reset when a Test Access Port (TAP)reset is applied. Set this option to True to instruct the debug hardware unit toperform reset the debug logic each time you connect.Code Sequence settingsMost systems store variables and the stack and heap in RAM. However, in somesystems only Flash or ROM is mapped in memory at power-up and RAM mustbe enabled by software in the boot code.To perform certain operations with some targets, the debug hardware unit mustdownload a piece of code into memory and make the processor execute it. Thiscode must be located in a writable area of memory (RAM) and must be accessedonly by the JTAG tool.You can set the address and size of this code using the Code Sequence Addressand the Code Sequence Size (bytes) settings.When you connect with a debugger to one of these targets, make sure that RAMis mapped in memory and that the cache clean code or code sequence address ismapped correctly. You can run a script from the command line to configure thetarget memory map straight after connecting to the target.This area of memory must be:• unused by the target• readable• writable• non-cacheable (for cached targets)• at least 128 bytes in size.The debug software downloads code sequences to this area to perform varioustasks, such as cleaning the cache and accessing certain system registers on targetssuch as ARM920T and ARM1136JF-S. It does not preserve the contents of thisarea.ARM DUI 0498F Copyright © 2010-2012 ARM. All rights reserved. 5-26ID021112Non-Confidential