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ARM DS-5 Using the Debug Hardware Configuration Utilities

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<strong>Debug</strong>ging with your debug hardware unit8.8 Breakpoints and <strong>the</strong> program counter8.8.1 See alsoThe following events describe <strong>the</strong> value of <strong>the</strong> program counter when a breakpoint is taken:<strong>Hardware</strong> data breakpointsThe address of <strong>the</strong> program counter after hitting a hardware data breakpointdepends on <strong>the</strong> processor being used.For <strong>ARM</strong> processors, a skid of ei<strong>the</strong>r one or two instructions occurs after a databreakpoint is hit. This means that <strong>the</strong> instruction that generated <strong>the</strong> breakpoint,and possibly <strong>the</strong> one after that, are both executed. The program counter shown inyour debugger might not be <strong>the</strong> address of <strong>the</strong> instruction that generated <strong>the</strong>breakpoint.<strong>Hardware</strong> instruction breakpointsThe address of <strong>the</strong> program counter after hitting a hardware instructionbreakpoint depends on <strong>the</strong> processor being used.For <strong>ARM</strong> processors, no skid occurs after hitting a hardware breakpoint. Thismeans that <strong>the</strong> instruction that generated <strong>the</strong> breakpoint has not been executed,and <strong>the</strong> program counter is set to this address.Software instruction breakpointsThe address of <strong>the</strong> program counter after hitting a software breakpoint is always<strong>the</strong> address of <strong>the</strong> breakpoint. Unless <strong>the</strong> instruction is a BKPT instruction, <strong>the</strong>instruction that generated <strong>the</strong> breakpoint is not yet executed.Processor eventsThe address of <strong>the</strong> program counter after a processor event is hit depends on <strong>the</strong>processor being used. For <strong>ARM</strong> processors, vector catch hardware stops with <strong>the</strong>program counter on exception vector, before <strong>the</strong> instruction at that address isexecuted.Concepts• <strong>Hardware</strong> breakpoints on page 8-8• Software instruction breakpoints on page 8-9• Processor exceptions on page 8-10• Interaction between breakpoint handling in <strong>the</strong> debug hardware and your debugger onpage 8-12• Problems setting breakpoints on page 8-14.<strong>ARM</strong> DUI 0498F Copyright © 2010-2012 <strong>ARM</strong>. All rights reserved. 8-11ID021112Non-Confidential

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