ARM DS-5 Using the Debug Hardware Configuration Utilities

Chapter 8Debugging with your debug hardware unitThe following topics provide information about debugging with debug hardware:• Post-mortem debugging on page 8-2• Semihosting on page 8-4• Adding an application SVC handler when using debug hardware on page 8-5• Cortex-M3 semihosting on page 8-7• Hardware breakpoints on page 8-8• Software instruction breakpoints on page 8-9• Processor exceptions on page 8-10• Breakpoints and the program counter on page 8-11• Interaction between breakpoint handling in the debug hardware and your debugger onpage 8-12• Problems setting breakpoints on page 8-14• Strategies used by debug hardware to debug cached processors on page 8-15• Debugging applications in ROM on page 8-17• Debugging from reset on page 8-18• Debugging with a simulated reset on page 8-19• Debugging with a reset register on page 8-20• Debugging with a target reset on page 8-21• Debugging systems with ROM at the exception vector on page 8-22.NoteFor more general information about debugging, see the DS-5 Debugger documentation.ARM DUI 0498F Copyright © 2010-2012 ARM. All rights reserved. 8-1ID021112Non-Confidential