ARM DS-5 Using the Debug Hardware Configuration Utilities
ARM DS-5 Using the Debug Hardware Configuration Utilities
ARM DS-5 Using the Debug Hardware Configuration Utilities
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Configuring CoreSight systemsThis is <strong>the</strong> total number of devices appearing between <strong>the</strong> CSTDI output on <strong>the</strong> JTAG-APport and <strong>the</strong> processor being configured. In <strong>the</strong> figure above, <strong>the</strong>re are two devices thatappear between <strong>the</strong> CSTDI output on <strong>the</strong> JTAG-AP port and <strong>the</strong> processor beingconfigured. Therefore, you must set this value to 2.6.17.1 See alsoConcepts• Configuring CoreSight processors on page 6-22• Configuring <strong>ARM</strong>7, <strong>ARM</strong>9, and <strong>ARM</strong>11 processors in CoreSight systems on page 6-24• Configuring SecurCore behavior if <strong>the</strong> processor clock stops when stepping instructionson page 5-38• Configuring TrustZone enabled processor behavior when debug privileges are reduced onpage 5-39.Reference• <strong>Debug</strong> hardware Advanced configuration reset options on page 5-37.<strong>ARM</strong> DUI 0498F Copyright © 2010-2012 <strong>ARM</strong>. All rights reserved. 6-27ID021112Non-Confidential
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