ARM DS-5 Using the Debug Hardware Configuration Utilities

Configuring CoreSight systems6.16 Configuring ARM7, ARM9, and ARM11 processors in CoreSight systemsThe following ARM7, ARM9, and ARM11 processors are supported in CoreSight systems:• ARM7EJ-S• ARM7TDMI• ARM7TDMI rev 4• ARM926EJ-S• ARM946ES• ARM966ES• ARM968ES• ARM9EJ-S• ARM1136JF-S• ARM1156T2F-S• ARM1176JZF-S• MPCore.You must add:• the ARMJTAG-DP device• the corresponding JTAG Access Port (JTAG-AP) for the processor.The following configuration items area available when configuring these processors inCoreSight systems:CoreSight AP index (CORESIGHT_AP_INDEX)The index of the JTAG-AP in the DAP that must be used to access the CoreSightdebug registers for the CoreSight component.JTAG-AP Port index for core (JTAG_PORT_ID)Each JTAG-AP implements eight JTAG port, each with its own TDI, TDO, TMS,and so on.The port index refers to the JTAG to which your CoreSight componentis connected.Fast memory download (FAST_MEM_WRITES)The Fast Memory Download option is available for those targets where the DAPand the Core are running fast enough to handle the data being sent to them by thedebug hardware unit without the debug hardware unit having to check that eachindividual transaction with the DAP has been successful. The processor is behindthe DAP, so all processor accesses have to go through the DAP. As a guide, thissetting must not be set for those targets that are FPGA-based.NoteWith this option set, error checking is disabled. If any errors occur, you are notinformed. If problems are encountered when downloading images, uncheck thisoption to resolve them.6.16.1 See alsoConcepts• Configuring CoreSight processors on page 6-22• Configuring CoreSight systems with multiple devices per JTAG-AP multiplexor port onpage 6-26• Configuring SecurCore behavior if the processor clock stops when stepping instructionson page 5-38ARM DUI 0498F Copyright © 2010-2012 ARM. All rights reserved. 6-24ID021112Non-Confidential