ARM DS-5 Using the Debug Hardware Configuration Utilities

Configuring CoreSight systems6.15 Configuring CoreSight processorsThe following figure shows an example of the CoreSight device settings for a processor:6.15.1 See alsoFigure 6-14 CoreSight device settings for a processorThe following configuration items are available when configuring CoreSight processors:CoreSight AP index (CORESIGHT_AP_INDEX)This is the index of the AP in the Debug Access Port (DAP) that must be used toaccess the CoreSight debug registers for the CoreSight component.CoreSight base address (CORESIGHT_BASE_ADDRESS)This is the base address of the CoreSight debug registers on the bus that isaccessed through the AP as specified in the CoreSight AP Index configurationitem.Concepts• Configuring ARM7, ARM9, and ARM11 processors in CoreSight systems on page 6-24• Configuring CoreSight systems with multiple devices per JTAG-AP multiplexor port onpage 6-26• Configuring SecurCore behavior if the processor clock stops when stepping instructionson page 5-38• Configuring TrustZone enabled processor behavior when debug privileges are reduced onpage 5-39.ARM DUI 0498F Copyright © 2010-2012 ARM. All rights reserved. 6-22ID021112Non-Confidential