ARM DS-5 Using the Debug Hardware Configuration Utilities

Configuring CoreSight systemsName=TPIU;Type=CSTPIU;Port0=ETMR4;This line specifies that a CoreSight TPIU is accessible using the precedingARMCS_DP.Port0=ETMR4; indicates that the source of trace that is routed through this TPIU isthe component named ETMR4.The following figure shows the Cortex-R4 FPGA Associations:1DeviceListARMCS-DPCortex-R4ETMETBTPIU3245671. Associations defined by order of devices2. Association defined by ETM=ETM element for Cortex-R45. Association defined by TraceInput=ETM6. Association defined by TraceInput=ETM3. Association defined by Core=Cortex-R4 7. Association defined by TraceOutput1=TPIU4. Association defined by TraceOutput2=ETBFigure 6-11 Cortex-R4 FPGA Associations6.12.1 See alsoConcepts• Setting up a CoreSight trace association file on page 6-11• About trace associations on page 6-6• Defining CoreSight trace associations on page 6-7• CoreSight topology and associations for the CoreSight DK11 on page 6-15• CoreSight topology and associations for the Cortex-M3 FPGA on page 6-19• CoreSight topology and associations for multiple trace sources on page 6-21.Reference• CoreSight device names and classes on page 5-52• Format of trace associations on page 6-8• Trace Association Editor dialog box on page 6-9.ARM DUI 0498F Copyright © 2010-2012 ARM. All rights reserved. 6-18ID021112Non-Confidential