NetSet properties

Multiple Supply Multiple Voltage(MSMV) SupportSeptember 14, 2005Vivek AstvanshCADENCE CONFIDENTIALCADENCE CONFIDENTIAL

Introduction• What is MSMV?Support for configurable power supplies to be resolved todifferent voltages.• Why MSMV?• Defines a way to describe multiple supplies and voltages in adesign.• Defines a way to transfer design data in text format acrossEDA tools.• Past InitiativeInvention of inherited connections, released since CIC release4.4.3.3

Basic Constructs• Net ExpressionsA net expression on a port/net that defines the default global signalname for the connection and name of a property to override thatdefault global signal.Example: [@abc:%:vdd!]• Netset propertiesNetset is a lookup property used in the net expression and definedat an instance.• Supply SensitivitiesThe properties supplySensitivity and groundSensitivity areused in mixed signal designs to map analog net voltage value todigital net logic value and vice versa.4

Database SupportAPIs defined for Supply Sensitivities in addition to inheritedconnections support to have complete support for MSMV• C• CDS_EXTERN_C dbTermId dbGetTermSupplySensitivity(dbTermId term)• SimilarlydbSetTermSupplySensitivity, dbGetTermGroundSensitivity &dbSetTermGroundSensitivity• SKILL• Same as of C – wrappers over C APIs.5

Database Support (continued…)• OA 2.2• oaTerm * oaTerm::getGroundSensitivity ( ) constSimilarly• oaTerm::getSupplySensitivity,• oaTerm::setGroundSensitivity,• oaTerm::setSupplySensitivity6

Languages SupportVerilog Uses Verilog 2001 attributes specifications.• Net expressions(* netExpr = “abc(gnd!)" *) input in;• NetSet properties(* netSet = “abc" *)(* abc = “mygnd" *) inv I1( out, in);• Supply sensitivity specification• (* groundSensitivity = “gnd" *)input in1;• (* supplySensitivity = “vdd" *)input in2;7

Languages Support (continued…)CDL• Net expressions*.NETEXPR gnd gnd!• Netset property$NETSET gnd=mygnd• Supply sensitivity• *.SUPPLYSENSITIVITY in1 powr• *.GROUNDSENSITIVITY in2 grnd8

Languages Support (continued…)LEF describes leaf cells for place and route systems so no need ofnetset• Net expressionsNETEXPR “power vdd” ;• Supply Sensitivity• SUPPLYSENSITIVITY POWR• GROUNDSENSITIVITY GRNDDEF - Syntax is same as for LEF9

Verilog Feature Illustration (continued…)• Use ModelUses a SKILL boolean environment variablesimPrintInhConnAttributes to enable this feature.10

Verilog Feature Illustration (continued…)11

Verilog Feature Illustration (continued…)module mytop ( out, a, in );output out;input a;(* supplySensitivity = "a " *)input in;(* netSet = "myVdd" *)(* myVdd = "abc" *)inv I0 ( out, in);endmodule12

Verilog Feature Illustration (continued…)13

Verilog Feature Illustration (continued…)module inv ( out, in );output out;input in;(* netExpr = "vdd(vdd_)" *) wire vdd_;(* netExpr = "gnd(gnd_)" *) wire gnd_;tranif1 M1( out, gnd_, in);tranif0 M0( vdd_, out, in);endmodule14

Verilog Feature Illustration (continued…)• Assura VerificationThe next step would be to verify the above netlist using Assura.Assura LVS has been enhanced since release 3.1.3 to handleMSMV inherited connection and supply sensitivity constructs.15

Conclusions• MSMV is a unique approach for handling complex designs withmultiple power supplies in a single IC (most cases for SoCs) andextends its support to all cadence tools in the EDA flow.• CIC tools like OSS, netlisters like Verilog, CDL Out, auCdl, andverification tools like ASSURA support this concept.• MSMV support needs to be extended to other Cadence solutions.Examples are import tools like VerilogIn, CDLIn.16

17Q & A