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IR Drop and Electromigration Analysis with Ultrasim Power Network ...

IR Drop and Electromigration Analysis with Ultrasim Power Network ...

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Processor <strong>with</strong> CPU 2193.787MHz. <strong>Ultrasim</strong> A mode is used as golden reference.( <strong>Ultrasim</strong> a mode uses table model while keeping the whole design in one partition).Table 2. Performance for <strong>Ultrasim</strong> UPS, VAVO <strong>and</strong> VAEOULTRASIM A MODE ULTRASIM A MODE + UPSSimulation time 22 hours 3 hoursDatabase 6GB 2.4GBVAVO loading time 3.5hours 21 minVAEO loading time 4.5 hours 3 hoursThe <strong>IR</strong> drop of both VDD <strong>and</strong> VSS power nets from <strong>Ultrasim</strong> A mode + UPS werecompared <strong>with</strong> those of <strong>Ultrasim</strong> A mode, the results were <strong>with</strong>in 5% of <strong>Ultrasim</strong> Amode for any voltage drop more than 3mV. UPS provided more than 7X speed up duringsimulation. The database created by UPS were significantly smaller (more than 2X).This was partially due to the fact that power networks consisted of R <strong>and</strong> C <strong>and</strong> they weresolved by UPS linear solver, so the time steps were relatively big. While in A mode allthe elements were solved together in one partition, the time steps were mainly controlledby all the nonlinear devices, causing much smaller time step in general, hence biggerdatabase. Thanks to the smaller size of the data base, the loading time for VAVO wasreduced significantly by 7X.VAEO’s loading time is the same for both cases, because the signal nets are essentiallysolved in the same way.Both <strong>Ultrasim</strong> A mode <strong>and</strong> <strong>Ultrasim</strong> A mode + UPS identified 112 EM violations. Fig. 4.shows the textual report of the EM analysis.6


Fig. 4 Textual report from VAEOBelow is an excerpt from the textual report for <strong>IR</strong> drop analysis.……….HIERARCHY = "/I0"SIMULATION RESULTS =‘’run/sim_results/COM_TOP16V07_sim/UltraSim/config_spectre_power_r"RESULTS TYPE = TRANSIENTTRANSIENT START = "0"TRANSIENT STOP = "10n"----------- "VDD_D" PIN -----------VOLTAGE ASSURA SIMULATIONDROP NETNAME NETNAME5.044K 8070:VDD_D I0.\_8070\:VDD_D4.524K 8067:VDD_D I0.\_8067\:VDD_D3.325K 8069:VDD_D I0.\_8069\:VDD_D1.447K 7517:VDD_D I0.\_7517\:VDD_D950.5 7516:VDD_D I0.\_7516\:VDD_D344.8 7536:VDD_D I0.\_7536\:VDD_D338.6 7538:VDD_D I0.\_7538\:VDD_D293.7 8014:VDD_D I0.\_8014\:VDD_D279.4 8013:VDD_D I0.\_8013\:VDD_D…….Section IV. ConclusionIn this paper, we discussed <strong>Ultrasim</strong> UPS + VAVO/VAEO flow, it is targeted at powergrid <strong>and</strong> signal integrity verification of analog <strong>and</strong> mixed signal designs. <strong>Ultrasim</strong> UPS isthe simulation engine while post-processing of the <strong>IR</strong> <strong>and</strong> EM data is done byVAVO/VAEO. VAVO analyzes the <strong>IR</strong> drops in the power net, while VAEO checks forEM problems on signal nets. <strong>Ultrasim</strong> UPS is well suited to h<strong>and</strong>le power networkefficiently <strong>with</strong>out much loss of accuracy. The small database enables faster loading timefor VAVO. <strong>IR</strong> drop <strong>and</strong> EM results are colored coded <strong>and</strong> are displayed on top of theextracted view or layout. Cross probing between textual reports <strong>and</strong> the color map greatlyimprove efficiency when debugging.Reference1) Virtuoso Analog VotageStorm <strong>and</strong> ElectronStorm User Guide, June 20052) Virtuoso <strong>Ultrasim</strong> Simulator User Guide, May 20053) Xiaohao Wu, Xiaodong Zhang, Lifeng Wu <strong>and</strong> Jun Kong, “ Fast <strong>and</strong> AccurateDynamic <strong>Power</strong> Net Solver <strong>with</strong> Fast SPICE Simulator <strong>Ultrasim</strong>”, CTC057

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