Simulator Configuration Guide for Synopsys Models

Chapter 5: Using NC-Verilog with Synopsys ModelsSimulator Configuration Guide4. To use the swiftpli shared library, invoke the NC-Verilog simulator to compile andsimulate your design as shown in the following examples:UNIX% ncverilog testbench model.v +loadpli1=swiftpli:swift_boot \+incdir+$LMC_HOME/sim/pli/src \+ncaccess+r+w5. If you are using the ncvlog, ncelab, and ncsim flow, create cds.lib and hdl.var filesin the directory where you will be executing these commands.Contents of cds.lib file:SOFTINCLUDE $CDS_INST_DIR/tools/inca/files/cds.libDEFINE worklib ./worklibContents of hdl.var file:SOFTINCLUDE $CDS_INST_DIR/tools/inca/files/hdl.var6. Execute the ncvlog, ncelab, and ncsim commands as follows:% ncvlog -w worklib testbench.v model.v \-incdir $LMC_HOME/sim/pli/src% ncelab -messages worklib.testbench \-loadpli1 swiftpli:swift_boot \-access +rw% ncsim worklib.testbenchFor information on LMTV commands that you can use with SmartModels onNC-Verilog, refer to “LMTV Commands” on page 271.Using FlexModels with NC-VerilogFlexModels work with NC-Verilog using a PLI application called LMTV that isdelivered in the form of a swiftpli shared library in $LMC_HOME/lib/platform.lib.For information on static linking LMTV, see “Static Linking with LMTV” on page 268.To use the prebuilt swiftpli, follow this procedure:1. Make sure NC-Verilog is set up properly and all required environment variables areset, as explained in “Setting Environment Variables” on page 89.92 Synopsys, Inc. October 6, 2003