Simulator Configuration Guide for Synopsys Models

Simulator Configuration GuidevChapter 5: Using NC-Verilog with Synopsys ModelsAIX:% setenv LIBPATH $LMC_HOME/lib/ibmrs.lib: \$CDS_INST_DIR/tools/lib:$LIBPATHHP-UX 32-bit:% setenv SHLIB_PATH $LMC_HOME/lib/hp700.lib:$CDS_INST_DIR/tools/lib: \$SHLIB_PATHHP-UX 64-bit% setenv SHLIB_PATH $LMC_HOME/lib/hp64.lib:$CDS_INST_DIR/tools/lib: \$SHLIB_PATHRunning 32-bit Models on 64-bit PlatformsIf you want to run 32-bit Synopsys models or tools on a 64-bit HP-UX or Solarisplatform, set the LMC_USE_32BIT environment variable to any value before invokingthe tool, as shown in the following example:% setenv LMC_USE_32BIT 1The LMC_USE_32BIT environmental variable is a “set/no-set” variable. That is, youcan set it to any value (even zero) to turn on 32-bit support on a 64-bit platform. If youdo not set it at all, the default condition is 32-bit models on 32-bit platforms, or 64-bitmodels on 64-bit platforms. You only set this environmental variable (to any value)when you are on a 64-bit platform using 32-bit models and simulators.Using SmartModels with NC-VerilogSmartModels work with NC-Verilog using a PLI application called LMTV that isdelivered in the form of a swiftpli shared library in $LMC_HOME/lib/platform.lib.For information on static linking LMTV, see “Static Linking with LMTV” on page 268.To use the prebuilt swiftpli, follow this procedure:1. Make sure NC-Verilog is set up properly and all required environment variables areset, as explained in “Setting Environment Variables” on page 89.2. Instantiate SmartModels in your design, defining the ports and defparams asrequired. For details on required SmartModel SWIFT parameters and modelinstantiation examples, refer to “Using SmartModels with SWIFT Simulators” onpage 18.3. There is no need to build a Verilog executable. You can use the one from$CDS_INST_DIR/tools/bin by adding it to your path statement.October 6, 2003 Synopsys, Inc. 91