Simulator Configuration Guide for Synopsys Models

More documents

Recommendations

Info

FiguresSimulator Configuration GuideFiguresFigure 1: run_flex_examples_in_vcs.pl Script . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52Figure 2: Sample Pin and Bus Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128Figure 3: Visible Symbol Properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129Figure 4: National Semiconductor DP8429 DRAM Controller . . . . . . . . . . . . . . . 148Figure 5: Bus and Pin Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150Figure 6: DWMM Visible Symbol Properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153Figure 7: Sample Component Interface for a Hardware Model . . . . . . . . . . . . . . . 168Figure 8: Hardware Model Registration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170Figure 9: VERA Model Class Hierarchy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 224Figure 10: DesignWare Memory Model with VERA Design Flow . . . . . . . . . . . . . 2298 Synopsys, Inc. October 6, 2003
Simulator Configuration GuideTablesTablesTable 1: Documentation Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14Table 2: SmartModel SWIFT Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19Table 3: FlexModel SWIFT Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23Table 4: FlexModel C-only Command Mode Files . . . . . . . . . . . . . . . . . . . . . . . . . 27Table 5: DesignWare Memory Model SWIFT Parameters . . . . . . . . . . . . . . . . . . . . 29Table 6: VCS SmartModel Explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43Table 7: FlexModel VCS Verilog Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44Table 8: VCS With One FlexModel On 32-bit Solaris Model Explanation . . . . . . . 49Table 9: FlexModel ModelSim Verilog File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64Table 10: FlexModel MTI VHDL Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80Table 11: FlexModel NC-Verilog Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93Table 12: FlexModel NC-VHDL Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112Table 13: Symbol Properties used by SWIFT Models . . . . . . . . . . . . . . . . . . . . . . . 129Table 14: Symbol Properties Required for Simulation . . . . . . . . . . . . . . . . . . . . . . . 130Table 15: Optional Symbol Properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131Table 16: Signal State Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135Table 17: QuickSim II Command Interaction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137Table 18: Elements in a TIBPAL22V10 Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143Table 19: Symbol Properties for DesignWare Memory Model Parameters . . . . . . . 153Table 20: Symbol Properties Required for DesignWare Memory Model Simulation 155Table 21: Optional DWMM Symbol Properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156Table 22: DWMM Signal State Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159Table 23: Common Unsupported QuickSim II Commands . . . . . . . . . . . . . . . . . . . 160Table 24: Mentor Graphics Vendor CPU Operating System Suffixes . . . . . . . . . . . 165Table 25: Sample Component Directory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171Table 26: Shell Software to Technology File Conversion . . . . . . . . . . . . . . . . . . . . . 174Table 27: Signal Instance Command Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177Table 28: FlexModel Scirocco VHDL Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 196Table 29: FlexModel Files Used with the VERA UDF Interface . . . . . . . . . . . . . . . 208Table 30: Link Line Object Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 209Table 31: VERA Header Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 210Table 32: FlexModel VERA Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213Table 33: Key DesignWare Memory Model VERA Files . . . . . . . . . . . . . . . . . . . . 225Table 34: VERA List File Path Mechanisms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 243Table 35: Valid Simultators for Using DWMM Models with VERA . . . . . . . . . . . . 244Table 36: Valid Platforms for Using DWMM Models with VERA . . . . . . . . . . . . . 244October 6, 2003 Synopsys, Inc. 9
Page 1: Simulator ConfigurationGuide for Sy
Page 4 and 5: ContentsSimulator Configuration Gui
Page 6 and 7: ContentsSimulator Configuration Gui
Page 10 and 11: TablesSimulator Configuration Guide
Page 12 and 13: PrefaceSimulator Configuration Guid
Page 18 and 19: Chapter 1: Using Synopsys Models wi
Page 40 and 41: Chapter 2: Using VCS with Synopsys
Page 58 and 59:
Chapter 2: Using VCS with Synopsys
Page 60 and 61:
Chapter 3: Using ModelSim Verilog w
Page 62 and 63:
Page 64 and 65:
Page 66 and 67:
Page 68 and 69:
Page 70 and 71:
Page 72 and 73:
Page 74 and 75:
Chapter 4: Using ModelSim VHDL with
Page 76 and 77:
Page 78 and 79:
Page 80 and 81:
Page 82 and 83:
Page 84 and 85:
Page 86 and 87:
Page 88 and 89:
Page 90 and 91:
Chapter 5: Using NC-Verilog with Sy
Page 92 and 93:
Page 94 and 95:
Page 96 and 97:
Page 98 and 99:
Page 100 and 101:
Page 102 and 103:
Page 104 and 105:
Page 106 and 107:
Page 108 and 109:
Chapter 6: Using NC-VHDL with Synop
Page 110 and 111:
Page 112 and 113:
Page 114 and 115:
Page 116 and 117:
Page 118 and 119:
Page 120 and 121:
Page 122 and 123:
Page 124 and 125:
Chapter 7: Using QuickSim II with S
Page 126 and 127:
Page 128 and 129:
Page 130 and 131:
Page 132 and 133:
Page 134 and 135:
Page 136 and 137:
Page 138 and 139:
Page 140 and 141:
Page 142 and 143:
Page 144 and 145:
Page 146 and 147:
Page 148 and 149:
Page 150 and 151:
Page 152 and 153:
Page 154 and 155:
Page 156 and 157:
Page 158 and 159:
Page 160 and 161:
Page 162 and 163:
Page 164 and 165:
Page 166 and 167:
Page 168 and 169:
Page 170 and 171:
Page 172 and 173:
Page 174 and 175:
.Chapter 7: Using QuickSim II with
Page 176 and 177:
Page 178 and 179:
Page 180 and 181:
Page 182 and 183:
Page 184 and 185:
Page 186 and 187:
Page 188 and 189:
Page 190 and 191:
Page 192 and 193:
Chapter 8: Using Scirocco with Syno
Page 194 and 195:
Page 196 and 197:
Page 198 and 199:
Page 200 and 201:
Page 202 and 203:
Page 204 and 205:
Page 206 and 207:
Page 208 and 209:
Chapter 9: Using VERA with Synopsys
Page 210 and 211:
Page 212 and 213:
Page 214 and 215:
Page 216 and 217:
Page 218 and 219:
Page 220 and 221:
Page 222 and 223:
Page 224 and 225:
Page 226 and 227:
Page 228 and 229:
Page 230 and 231:
Page 232 and 233:
Page 234 and 235:
Page 236 and 237:
Page 238 and 239:
Page 240 and 241:
Page 242 and 243:
Page 244 and 245:
Page 246 and 247:
Page 248 and 249:
Page 250 and 251:
Page 252 and 253:
Page 254 and 255:
Page 256 and 257:
Page 258 and 259:
Page 260 and 261:
Page 262 and 263:
Chapter 10: Using SystemC with Syno
Page 264 and 265:
Page 266 and 267:
Page 268 and 269:
Appendix A: Using LMTV with Synopsy
Page 270 and 271:
Page 272 and 273:
Page 274 and 275:
Page 276 and 277:
Page 278 and 279:
Page 280 and 281:
Page 282 and 283:
Appendix B: Using Custom Memory Mod
Page 284 and 285:
Page 286 and 287:
Page 288 and 289:
Page 290 and 291:
Page 292 and 293:
Page 294 and 295:
Page 296 and 297:
Page 298 and 299:
Page 300 and 301:
Page 302 and 303:
IndexSimulator Configuration Guide$
Page 304 and 305:
IndexSimulator Configuration Guidef
Page 306 and 307:
IndexSimulator Configuration GuideL
Page 308 and 309:
IndexSimulator Configuration GuideQ
Page 310 and 311:
IndexSimulator Configuration GuideS
show all

Simulator Configuration Guide for Synopsys Models

You also want an ePaper? Increase the reach of your titles

Delete template?

Save as template?