Simulator Configuration Guide for Synopsys Models

Simulator Configuration GuideChapter 4: Using ModelSim VHDL with Synopsys Models4Using ModelSim VHDL with SynopsysModelsOverviewThis chapter explains how to use SmartModels, FlexModels, DesignWare MemoryModels, and hardware models with ModelSim VHDL. The procedures are organizedinto the following major sections:● “Setting Environment Variables” on page 73● “Using SmartModels with ModelSim VHDL” on page 75● “Using FlexModels with ModelSim VHDL” on page 79● “Using DesignWare Memory Models with ModelSim VHDL” on page 82● “Using Hardware Models with ModelSim VHDL” on page 84Setting Environment VariablesFirst, set the basic environment variables. If you are not using one of the model typesspecified, skip that step. In some cases, the procedures that follow in this chapter includesteps for setting additional environment variables.1. Set the LMC_HOME environment variable to point to the location of yourSmartModel, FlexModel, or DesignWare Memory Model installation tree, asfollows:% setenv LMC_HOME path_to_models_installationOctober 6, 2003 Synopsys, Inc. 73