Simulator Configuration Guide for Synopsys Models

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Chapter 3: Using ModelSim Verilog with Synopsys ModelsSimulator Configuration GuideThen uncomment the libsm and libswift lines corresponding to the platform you areusing:; ModelSim’s interface to Logic Modeling’s SmartModel SWIFT software;libsm = $MODEL_TECH/libsm.sl; libsm = $MODEL_TECH/libsm.dll; Logic Modeling’s SmartModel SWIFT software (HP 9000 Series 700); libswift = $LMC_HOME/lib/hp700.lib/libswift.sl; Logic Modeling’s SmartModel SWIFT software (IBM RISC System/6000); libswift = $LMC_HOME/lib/ibmrs.lib/swift.o; Logic Modeling’s SmartModel SWIFT software (Sun4 Solaris); libswift = $LMC_HOME/lib/sun4Solaris.lib/libswift.so; Logic Modeling’s SmartModel SWIFT software (Sun4 SunOS); do setenv LD_LIBRARY_PATH $LMC_HOME/lib/sun4SunOS.lib; and run "vsim.swift".; ; libswift = $LMC_HOME/lib/pcnt.lib/libswift.dll; Logic Modeling's SmartModel SWIFT software (HP64); libswift = $LMC_HOME/lib/hp64.lib/libswift.sl; Logic Modeling's SmartModel SWIFT software (Sparc64); libswift = $LMC_HOME/lib/sparc64.lib/libswift.soNoteIf you are using VHDL SmartModels in your Verilog simulation, you mustalso edit the modelsim.ini file to uncomment the libsm and libswift lines foryour platform (see “Using ModelSim VHDL with Synopsys Models” onpage 73).5. Compile your code as shown in the following examples:UNIX% vlog testbench model.v +incdir+$LMC_HOME/sim/pli/src6. Invoke the simulator as shown in the following examples:HP-UX 32-bit% vsim -pli $LMC_HOME/lib/hp700.lib/swiftpli_mti.sl designSolaris 32-bit% vsim -pli $LMC_HOME/lib/sun4Solaris.lib/swiftpli_mti.so designHP64% vsim -pli $LMC_HOME/lib/hp64.lib/swiftpli_mti.sl designSparc64% vsim -pli $LMC_HOME/lib/sparc64.lib/swiftpli_mti.so designAIX% vsim -pli $LMC_HOME/lib/ibmrs.lib/swiftpli_mti.so design62 Synopsys, Inc. October 6, 2003
Simulator Configuration GuideChapter 3: Using ModelSim Verilog with Synopsys ModelsLinux% vsim -pli $LMC_HOME/lib/x86_linux.lib/swiftpli_mti.so designNoteFor information on LMTV commands that you can use with SmartModelson ModelSim Verilog, refer to “LMTV Commands” on page 271.Using FlexModels with ModelSim VerilogFlexModels work with ModelSim-Verilog using a PLI application called LMTV that isdelivered in the form of a swiftpli_mti shared library in $LMC_HOME/lib/platform.lib.For information on static linking LMTV, see “Static Linking with LMTV” on page 268.To use the prebuilt swiftpli_mti, follow this procedure:1. Make sure ModelSim Verilog is set up properly and all required environmentvariables are set, as explained in “Setting Environment Variables” on page 59.2. Map your work library as shown in the following example:% vlib work% vmap work workThis step produces a modelsim.ini file.3. Edit the modelsim.ini file to uncomment the Resolution statement, and set theresolution value to 100ps, as shown in the following example.Resolution = 100psNoteIf you are using VHDL SmartModels in your Verilog simulation, you mustalso edit the modelsim.ini file to uncomment the libsm and libswift lines foryour platform (see “Using ModelSim VHDL with Synopsys Models” onpage 73).4. Create a working directory and run flexm_setup to make copies of the model'sinterface and example files there, as shown in the following example:% $LMC_HOME/bin/flexm_setup -dir workdir model_fxYou must run flexm_setup every time you update your FlexModel installation witha new model version. Table 9 lists the files that flexm_setup copies to your workingdirectory.October 6, 2003 Synopsys, Inc. 63
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Chapter 9: Using VERA with Synopsys
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Chapter 10: Using SystemC with Syno
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Appendix A: Using LMTV with Synopsy
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Appendix B: Using Custom Memory Mod
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Simulator Configuration Guide for Synopsys Models

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