Simulator Configuration Guide for Synopsys Models

More documents

Recommendations

Info

ContentsSimulator Configuration GuideScript for Running FlexModel Examples in VCS . . . . . . . . . . . . . . . . . . . . . . . 51Example Simulator Run Script . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53Using DesignWare Memory Models with VCS . . . . . . . . . . . . . . . . . . . . . . . . . . . 53Using Hardware Models with VCS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55Example Using Runtime Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57Example Using DelayRange Parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57VCS Utilities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58Chapter 3Using ModelSim Verilog with Synopsys Models . . . . . . . . . . . . . . . . . . . . . . . . . . . 59Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59Setting Environment Variables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59Running 32-bit Models on 64-bit Platforms . . . . . . . . . . . . . . . . . . . . . . . . . . . 61Using SmartModels with ModelSim Verilog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61Using FlexModels with ModelSim Verilog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63Using DesignWare Memory Models with ModelSim Verilog . . . . . . . . . . . . . . . . 66Using Hardware Models with ModelSim Verilog . . . . . . . . . . . . . . . . . . . . . . . . . . 68ModelSim Verilog Utilities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70Chapter 4Using ModelSim VHDL with Synopsys Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73Setting Environment Variables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73Running 32-bit Models on 64-bit Platforms . . . . . . . . . . . . . . . . . . . . . . . . . . . 75Using SmartModels with ModelSim VHDL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75sm_entity Command Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79Using FlexModels with ModelSim VHDL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79Using DesignWare Memory Models with ModelSim VHDL . . . . . . . . . . . . . . . . . 82Using Hardware Models with ModelSim VHDL . . . . . . . . . . . . . . . . . . . . . . . . . . 84ModelSim VHDL Example Using TILS299 Hardware Model . . . . . . . . . . . . . 85hm_entity Command Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86ModelSim VHDL Utilities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88Chapter 5Using NC-Verilog with Synopsys Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89Setting Environment Variables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89Running 32-bit Models on 64-bit Platforms . . . . . . . . . . . . . . . . . . . . . . . . . . . 91Using SmartModels with NC-Verilog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91Using FlexModels with NC-Verilog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92Using DesignWare Memory Models with NC-Verilog . . . . . . . . . . . . . . . . . . . . . . 954 Synopsys, Inc. October 6, 2003
Simulator Configuration GuideContentsUsing Hardware Models with NC-Verilog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97NC-Verilog Utilities Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98NC-Verilog Utilities Reference Pages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99$lm_log_test_vectors Command Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . 99$lm_loop_instance Command Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100$lm_timing_information Command Reference . . . . . . . . . . . . . . . . . . . . . . . . 101$lm_timing_measurements Command Reference . . . . . . . . . . . . . . . . . . . . . . 102$lm_unknowns Command Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103lmvsg Command Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105Chapter 6Using NC-VHDL with Synopsys Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107Setting Environment Variables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107Running 32-bit Models on 64-bit Platforms . . . . . . . . . . . . . . . . . . . . . . . . . . 109Using SmartModels with NC-VHDL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109Using FlexModels with NC-VHDL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110Using DesignWare Memory Models withNC-VHDL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114Using VERA and DesignWare Memory Models withNC-VHDL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117Using Hardware Models with NC-VHDL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120NC-VHDL Example with TILS299 Hardware Model . . . . . . . . . . . . . . . . . . 120NC-VHDL Utilities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121Chapter 7Using QuickSim II with Synopsys Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123Setting Environment Variables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123Running 32-bit Models on 64-bit Platforms . . . . . . . . . . . . . . . . . . . . . . . . . . 124Using SmartModels and FlexModels with QuickSim II . . . . . . . . . . . . . . . . . . . . 125Installing the QuickSim II SWIFT Interface . . . . . . . . . . . . . . . . . . . . . . . . . . 125Using SmartModels/FlexModels with QuickSim II . . . . . . . . . . . . . . . . . . . . 127Schematic Capture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127Logic Simulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134Custom Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144Using DesignWare Memory Models with QuickSim II . . . . . . . . . . . . . . . . . . . . 151Installing the QuickSim II SWIFT Interface for DWMM . . . . . . . . . . . . . . . . 151DWMM Schematic Capture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151DWMM Logic Simulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158DWMM Custom Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163October 6, 2003 Synopsys, Inc. 5
Page 1: Simulator ConfigurationGuide for Sy
Page 6 and 7: ContentsSimulator Configuration Gui
Page 8 and 9: FiguresSimulator Configuration Guid
Page 10 and 11: TablesSimulator Configuration Guide
Page 12 and 13: PrefaceSimulator Configuration Guid
Page 18 and 19: Chapter 1: Using Synopsys Models wi
Page 40 and 41: Chapter 2: Using VCS with Synopsys
Page 54 and 55:
Chapter 2: Using VCS with Synopsys
Page 56 and 57:
Page 58 and 59:
Page 60 and 61:
Chapter 3: Using ModelSim Verilog w
Page 62 and 63:
Page 64 and 65:
Page 66 and 67:
Page 68 and 69:
Page 70 and 71:
Page 72 and 73:
Page 74 and 75:
Chapter 4: Using ModelSim VHDL with
Page 76 and 77:
Page 78 and 79:
Page 80 and 81:
Page 82 and 83:
Page 84 and 85:
Page 86 and 87:
Page 88 and 89:
Page 90 and 91:
Chapter 5: Using NC-Verilog with Sy
Page 92 and 93:
Page 94 and 95:
Page 96 and 97:
Page 98 and 99:
Page 100 and 101:
Page 102 and 103:
Page 104 and 105:
Page 106 and 107:
Page 108 and 109:
Chapter 6: Using NC-VHDL with Synop
Page 110 and 111:
Page 112 and 113:
Page 114 and 115:
Page 116 and 117:
Page 118 and 119:
Page 120 and 121:
Page 122 and 123:
Page 124 and 125:
Chapter 7: Using QuickSim II with S
Page 126 and 127:
Page 128 and 129:
Page 130 and 131:
Page 132 and 133:
Page 134 and 135:
Page 136 and 137:
Page 138 and 139:
Page 140 and 141:
Page 142 and 143:
Page 144 and 145:
Page 146 and 147:
Page 148 and 149:
Page 150 and 151:
Page 152 and 153:
Page 154 and 155:
Page 156 and 157:
Page 158 and 159:
Page 160 and 161:
Page 162 and 163:
Page 164 and 165:
Page 166 and 167:
Page 168 and 169:
Page 170 and 171:
Page 172 and 173:
Page 174 and 175:
.Chapter 7: Using QuickSim II with
Page 176 and 177:
Page 178 and 179:
Page 180 and 181:
Page 182 and 183:
Page 184 and 185:
Page 186 and 187:
Page 188 and 189:
Page 190 and 191:
Page 192 and 193:
Chapter 8: Using Scirocco with Syno
Page 194 and 195:
Page 196 and 197:
Page 198 and 199:
Page 200 and 201:
Page 202 and 203:
Page 204 and 205:
Page 206 and 207:
Page 208 and 209:
Chapter 9: Using VERA with Synopsys
Page 210 and 211:
Page 212 and 213:
Page 214 and 215:
Page 216 and 217:
Page 218 and 219:
Page 220 and 221:
Page 222 and 223:
Page 224 and 225:
Page 226 and 227:
Page 228 and 229:
Page 230 and 231:
Page 232 and 233:
Page 234 and 235:
Page 236 and 237:
Page 238 and 239:
Page 240 and 241:
Page 242 and 243:
Page 244 and 245:
Page 246 and 247:
Page 248 and 249:
Page 250 and 251:
Page 252 and 253:
Page 254 and 255:
Page 256 and 257:
Page 258 and 259:
Page 260 and 261:
Page 262 and 263:
Chapter 10: Using SystemC with Syno
Page 264 and 265:
Page 266 and 267:
Page 268 and 269:
Appendix A: Using LMTV with Synopsy
Page 270 and 271:
Page 272 and 273:
Page 274 and 275:
Page 276 and 277:
Page 278 and 279:
Page 280 and 281:
Page 282 and 283:
Appendix B: Using Custom Memory Mod
Page 284 and 285:
Page 286 and 287:
Page 288 and 289:
Page 290 and 291:
Page 292 and 293:
Page 294 and 295:
Page 296 and 297:
Page 298 and 299:
Page 300 and 301:
Page 302 and 303:
IndexSimulator Configuration Guide$
Page 304 and 305:
IndexSimulator Configuration Guidef
Page 306 and 307:
IndexSimulator Configuration GuideL
Page 308 and 309:
IndexSimulator Configuration GuideQ
Page 310 and 311:
IndexSimulator Configuration GuideS
show all

Simulator Configuration Guide for Synopsys Models

You also want an ePaper? Increase the reach of your titles

Delete template?

Save as template?