Simulator Configuration Guide for Synopsys Models

Simulator Configuration GuideChapter 2: Using VCS with Synopsys ModelsTable 8 lists each line in the invocation example above, along with explanations forwhat each one does.Table 8: VCS With One FlexModel On 32-bit Solaris Model Explanation$VCS_HOME/bin/vcsLine Reference`$LMC_HOME/bin/flexm_setup model_fx`/examples/verilog/model_tst.v`$LMC_HOME/bin/flexm_setup model_fx`/examples/verilog/model.v`$LMC_HOME/bin/flexm_setup model_fx`/examples/verilog/model_fx_vcs.v+incdir+$LMC_HOME/sim/pli/src+incdir+`$LMC_HOME/bin/flexm_setupmodel_fx`/src/verilogDescriptionPath to the file that starts the VCS simulator.Specifies the path to the model testbench file.Specifies the path to the model Verilogwrapper file.Specifies the path to the model VCS templatefile.Includes the path to the flexmodel_pkg.incfile, which contains Verilog task definitionsfor general FlexModel interface commands.Includes the path to the model-specificVerilog task files, including model_pkg.inc.-P $LMC_HOME/sim/pli/src/slm_pli.tab Specifies the FlexModel/MemPro PLI tableentry file.$LMC_HOME/lib/sun4Solaris.lib/slm_pli.o Specifies the platform-specific PLI objectfile.-l vcs_sim.log Specifies a log file where VCS writescompilation and simulation messages.-Mupdate-RI-lmc-swift-full64This specifies incremental compilation,which causes VCS to compile only themodules that have changed since the last run.This makes VCS run interactively. VCSinvokes the XVCS GUI after compilation andpauses the simulator at time zero.This switch causes VCS to load the SWIFTinterface.This is not shown in the examples, but mustbe used if you are simulating in 64-bits.Compiles the design in 64 bit mode andcreates a 64 bit executable for simulating in64 bit mode.October 6, 2003 Synopsys, Inc. 49