Simulator Configuration Guide for Synopsys Models

Chapter 2: Using VCS with Synopsys ModelsSimulator Configuration GuideExample using bus-level wrapper (model.v) with timing:model U1 ( model ports )defparamU1.FlexTimingMode = `FLEX_TIMING_MODE_ON,U1.TimingVersion = “timingversion”,U1.DelayRange = “range”,U1.FlexModelId = “TMS_INST1”;6. Invoke VCS to compile and simulate your design as shown in the followingexamples:Solaris 32-bit:% vcs workdir/examples/verilog/model.v \workdir/examples/verilog/model_fx_vcs.v \$LMC_HOME/lib/sun4Solaris.lib/slm_pli.o \testbench.v \-P $LMC_HOME/sim/pli/src/slm_pli.tab \-lmc-swift \- RI \+incdir+$LMC_HOME/sim/pli/src \+incdir+workdir/src/verilog% simvHP-UX 32-bit:% vcs workdir/examples/verilog/model.v \workdir/examples/verilog/model_fx_vcs.v \$LMC_HOME/lib/hp700.lib/slm_pli.o \testbench.v \-P $LMC_HOME/sim/pli/src/slm_pli.tab \-lmc-swift \-RI+incdir+$LMC_HOME/sim/pli/src \+incdir+workdir/src/verilog \% simvSparc64:% vcs workdir/examples/verilog/model.v \workdir/examples/verilog/model_fx_vcs.v \$LMC_HOME/lib/sparc64.lib/slm_pli.o \testbench.v \-P $LMC_HOME/sim/pli/src/slm_pli.tab \-full64 \-lmc-swift \-RI \+incdir+$LMC_HOME/sim/pli/src \+incdir+workdir/src/verilog% simv46 Synopsys, Inc. October 6, 2003