Simulator Configuration Guide for Synopsys Models

Chapter 2: Using VCS with Synopsys ModelsSimulator Configuration GuideUsing SmartModels with VCSTo use SmartModels with VCS, follow this procedure:1. Make sure VCS is set up properly and all required environment variables are set, asexplained in “Setting Environment Variables” on page 40.2. Synopsys provides a tool, vcs_sg, that allows you to generate multiple modelwrapper files. You must select VCS as your Verilog simulator during theSmartModel installation in order to have vcs_sg available. It will be installed as$LMC_HOME/bin/vcs_sgThe vcs_sg tool also extends the usefulness of the model wrapper files generated byVCS in two ways:❍it adds statements that allow the DelayRange to be controlled by the VCScommand line +define parameters (or a defparam in your testbench)❍ it adds a check for the VCS command line +define+SwiftChecksOff parameterthat turns constraints off.You can change the default name of the generated wrapper files (model.swift.v), aswell as the location that the generated wrappers are written to. Use the followingcommand to return the usage message for the vcs_sg tool.% $LMC_HOME/bin/vcs_sg -h3. Instantiate SmartModels in your design, defining the ports and defparams asrequired. For details on the required SWIFT parameters and SmartModelinstantiation examples, refer to “SmartModel SWIFT Parameters” on page 19.4. Invoke the VCS simulator as shown in the following examples:Solaris (32-bit):% $VCS_HOME/bin/vcs -lmc-swift model.swift.v model_tb.v \-l vcs_sim.log \-Mupdate \-RIHP-UX (32-bit):% $VCS_HOME/bin/vcs -lmc-swift model.swift.v model_tb.v \-l vcs_sim.log \-Mupdate \-RI42 Synopsys, Inc. October 6, 2003