Simulator Configuration Guide for Synopsys Models

Simulator Configuration GuideAppendix B: Using Custom Memory Models❍Linux:% vcs Verilog_modules custom_model_files \$LMC_HOME/lib/x86_linux.lib/slm_pli.o \-P $LMC_HOME/sim/pli/src/slm_pli.tab \+incdir+$LMC_HOME/sim/pli/src \-LDFLAGS -rdynamic5. Invoke VCS and simulate your design:% simvUsing Custom Memory Models with VCS and CTestbenchesIf you are using DWMM C testbench interface functions in your design, use thefollowing procedure.1. Develop a C testbench with your own routines that call the C interface functions.For more information on using the C testbench interface, refer to the “SystemCTestbench Interface” chapter in the DesignWare Memory Model User’s Manual.2. Add the following line to your C testbench.#include "mempro_c_tb.h"3. Make a local copy of slm_pli.tab by copying from$LMC_HOME/sim/pli/src/slm_pli.tab and adding the following line for each Croutine you have developed:$your_task_name call=your_func_name4. Instantiate your custom memory models in your Verilog design. Define ports andparameters as required. For information on parameters used with custom memorymodels, see “Instantiating Custom Memory Models” on page 285.5. Add calls to the Verilog tasks that correspond with your SystemC routines, fromyour local slm_pli.tab file, to your Verilog design. For example:$your_task_name();6. Invoke VCS to compile your design:❍Solaris:% vcs Verilog_modules custom_model_files \$LMC_HOME/lib/sun4Solaris.lib/slm_pli.o \-P local_slm_pli.tab your_testbench.c \-CFLAGS “-I$LMC_HOME/include” \+incdir+$LMC_HOME/sim/pli/srcOctober 6, 2003 Synopsys, Inc. 287