Simulator Configuration Guide for Synopsys Models

Appendix B: Using Custom Memory ModelsSimulator Configuration GuideUsing Custom Memory Models with VCSTo use custom memory models with VCS, use the following procedures for Verilog andC testbenches. VCS links external PLI routines during compilation of your design. Youdo not need to rebuild the VCS simulator.Using Custom Memory Models with VCS and VerilogTestbenches1. Make sure VCS is set up properly and all required environment variables are set, asexplained in “Setting Environment Variables” on page 40.2. If you are using HDL testbench interface commands in your design, add thefollowing line to your Verilog testbench — otherwise, skip to step 3.`include "mempro_pkg.v"For more information on using the HDL testbench interface, refer to the “HDLTestbench Interface” chapter in the DesignWare Memory Model User’s Manual.3. Instantiate your custom memory models in your design. Define ports andparameters as required. For details, see “Instantiating Custom Memory Models” onpage 285.4. Invoke VCS to compile your design, as shown in the following examples:❍❍Solaris:% vcs Verilog_modules custom_model_files \$LMC_HOME/lib/sun4Solaris.lib/slm_pli.o \-P $LMC_HOME/sim/pli/src/slm_pli.tab \+incdir+$LMC_HOME/sim/pli/srcIf you are using the MemScope Dynamic Data Exchange (DDX) feature:% vcs Verilog_modules custom_model_files \+vcs+lic+wait \-Xstrict=0x01 -syslib “-lpthread” \$LMC_HOME/lib/sun4Solaris.lib/slm_pli.o \-P $LMC_HOME/sim/pli/src/slm_pli.tab \+incdir+$LMC_HOME/sim/pli/srcHP-UX:% vcs Verilog_modules custom_model_files \$LMC_HOME/lib/hp700.lib/slm_pli.o \-P $LMC_HOME/sim/pli/src/slm_pli.tab \+incdir+$LMC_HOME/sim/pli/src \286 Synopsys, Inc. October 6, 2003