Simulator Configuration Guide for Synopsys Models

Chapter 9: Using VERA with Synopsys ModelsSimulator Configuration GuideAdding DesignWare Memory Model Commands to theVERA TestbenchThe following steps describe how to add DWMM model commands to a VERAtestbench so that you can use it with DWMM models.1. Open your VERA testbench in a text editor.2. To include the MemPro class in the mempromodel.vrh file, add the line:#include "mempromodel.vrh"after the line:#include 3. Create an instance of the MemPro class for each model in your design.To use the MemPro class methods, you must use the “new” constructor to create aMemPro object that maps to a DWMM model instance in your HDL design. The“new” constructor expects one integer argument, and the DWMM model instanceID, which is the numeric instance ID given to the DWMM model (in the Verilog orVHDL testbench). The constructor uses this argument to get an instance handle forthe DWMM model. If the instance ID passed is invalid, the model issues an errormessage and sets a flag in the class indicating the severity of the error.NoteAlways call inst.showStatus() after inst = new (inst_id); to ensure that theMemPro class constructor worked properly and that you provided the ID ofa DWMM model.The following example creates an instance of the VERA object connected to theHDL model with an instance ID of 67, and checks for errors.// 67 is the model instance id, defined in the// top-level HDL testbench.MemPro mem1 = new( 67 );if (mem1.showStatus()!= SLM_TESTBENCH_SUCCESS){//Error handlingexit(1);}You can then call DWMM testbench methods for object “mem1”.230 Synopsys, Inc. October 6, 2003