Simulator Configuration Guide for Synopsys Models

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Chapter 9: Using VERA with Synopsys ModelsSimulator Configuration Guide# generate library slm_libslm_lib :@rm -rf slm_lib$(VLIB) slm_lib$(VCOM) $(VCOM_OPT) ${LMC_HOME}/sim/mti/src/slm_hdlc.vhd$(VCOM) $(VCOM_OPT) ${LMC_HOME}/sim/mti/src/flexmodel_pkg.vhd$(VCOM) $(VCOM_OPT) ./src/vhdl/enethub_user_pkg.vhd$(VCOM) $(VCOM_OPT) ./src/vhdl/enethub_pkg.vhd$(VCOM) $(VCOM_OPT) ./src/vhdl/enettx_user_pkg.vhd$(VCOM) $(VCOM_OPT) ./src/vhdl/enettx_pkg.vhd$(VCOM) $(VCOM_OPT) ./src/vhdl/enetrx_user_pkg.vhd$(VCOM) $(VCOM_OPT) ./src/vhdl/enetrx_pkg.vhdifeq ($(EXAMPLE_TB), full_duplex)$(VCOM) $(VCOM_OPT) ./src/vhdl/rmiirs_user_pkg.vhd$(VCOM) $(VCOM_OPT) ./src/vhdl/rmiirs_pkg.vhdendif$(VCOM) $(VCOM_OPT) ./examples/vhdl/enethub_fx_mti.vhd$(VCOM) $(VCOM_OPT) ./examples/vhdl/enettx_fx_mti.vhd$(VCOM) $(VCOM_OPT) ./examples/vhdl/enetrx_fx_mti.vhdifeq ($(EXAMPLE_TB), full_duplex)$(VCOM) $(VCOM_OPT) ./examples/vhdl/rmiirs_fx_mti.vhdendif$(VCOM) $(VCOM_OPT) ${SRC_DIR}/enetsys_comp.vhd$(VCOM) $(VCOM_OPT) ./examples/vhdl/enethub.vhd$(VCOM) $(VCOM_OPT) ./examples/vhdl/enettx.vhd$(VCOM) $(VCOM_OPT) ./examples/vhdl/enetrx.vhdifeq ($(EXAMPLE_TB), full_duplex)$(VCOM) $(VCOM_OPT) ./examples/vhdl/rmiirs.vhdendif#check if LD_LIBRARY_PATH contains vera_outcheck_env :@if [ -z "`echo ${LD_LIBRARY_PATH} | grep "vera_out"`" ]; then \echo ""; \echo "LD_LIBRARY_PATH should contain ./vera_out (path to libvera_sro.so)"; \echo ""; \exit 1; \fi# generate the list of simulator commands../sim.cmd :@echo "run -all" > ./sim.cmd@echo "quit" >> ./sim.cmd# generate vera.ini./vera.ini :@echo "vera_pload=$(PROJ_FILE)" > ./vera.ini# Generate modelsim.ini if it does not exist.# Existance is checked to enable the user to use his own modelsim.ini# Therefore, modelsim.ini is also not removed in cleaning targets below.ini :@if [ ! -f modelsim.ini ]; then \echo "[Library]" > modelsim.ini; \222 Synopsys, Inc. October 6, 2003
Simulator Configuration GuideChapter 9: Using VERA with Synopsys Modelsmodelsim.ini; \fiecho "slm_lib = ./slm_lib/" >> modelsim.ini; \echo "std = \$$MODEL_TECH/../std" >> modelsim.ini; \echo "ieee = \$$MODEL_TECH/../ieee" >> modelsim.ini; \echo "" >> modelsim.ini; \echo "[vsim]" >> modelsim.ini; \echo "PathSeparator = /" >> modelsim.ini; \echo "" >> modelsim.ini; \echo "[lmc]" >> modelsim.ini; \echo "libswift = \$$LMC_HOME/lib/sun4Solaris.lib/libswift.so" >># clean everything out.very_clean : clean@rm -rf $(OUT_DIR) src examples# clean the simulation related filesclean: vera_clean@rm -rf ./vera.ini ./sim.cmd slm_lib# clean just the vera compilation ("make compile_vera; make run" to rerun)vera_clean :@rm -rf *shell* $(OUT_DIR)/$(VERA_OBJ) transcriptUsing VERA with DesignWare MemoryModelsThis section explains how to use VERA with DesignWare Memory Models (DWMM).Standard DWMM models are binary simulation models, and have an _mx extension inthe model name: model_mx.This section contains the following topics:● “DesignWare Memory Models with VERA” on page 224●“Adding DesignWare Memory Model Commands to the VERA Testbench” onpage 230● “Building the VERA UDF Dynamic Library” on page 235● “Compiling the VERA Source Files” on page 242● “Building and Invoking the Simulator Executable” on page 244October 6, 2003 Synopsys, Inc. 223
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Simulator ConfigurationGuide for Sy
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ContentsSimulator Configuration Gui
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FiguresSimulator Configuration Guid
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TablesSimulator Configuration Guide
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PrefaceSimulator Configuration Guid
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Chapter 1: Using Synopsys Models wi
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Chapter 2: Using VCS with Synopsys
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Chapter 3: Using ModelSim Verilog w
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Chapter 4: Using ModelSim VHDL with
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Chapter 5: Using NC-Verilog with Sy
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Chapter 7: Using QuickSim II with S
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Appendix A: Using LMTV with Synopsy
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Appendix B: Using Custom Memory Mod
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Simulator Configuration Guide for Synopsys Models

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