Simulator Configuration Guide for Synopsys Models

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Chapter 9: Using VERA with Synopsys ModelsSimulator Configuration GuideEXAMPLE_TB= half_duplex# utilitiesFLEXM_SETUP= ${LMC_HOME}/bin/flexm_setupMTI_BIN = ${MTI_HOME}/sunos5VLIB= ${MTI_BIN}/vlibVSIM= ${MTI_BIN}/vsimVCOM= ${MTI_BIN}/vcom# directories and filesOUT_DIR = ./vera_outSRC_DIR = ./examples/vera/testbench_files/half_duplexifeq ($(EXAMPLE_TB), full_duplex)SRC_DIR = ./examples/vera/testbench_files/full_duplexendifPROJ_FILE= ${SRC_DIR}/enetsys.proj# sourcesVERA_SRC = enetsys_mac1.vr enetsys_mac2.vr enetsys_media.vrVHDL_SRC = enetsys_MAC1_proj_shell.vhd \enetsys_MAC2_proj_shell.vhd \enetsys_media_proj_shell.vhd \${SRC_DIR}/test_top.vhd# optionsDESIGN_UNIT = cfgtopVERA_INC = -I${LMC_HOME}/sim/vera/src -I./src/veraVCOM_OPT = -93 -work slm_lib# miscVERA_OBJ = $(VERA_SRC:%.vr=%.vro)FLEXBASE_VR = lstmodel.vr swiftmodel.vr flexmodel_pkg.vrFLEXBASE_VROS = $(FLEXBASE_VR:%.vr=%.vro)PKG_VR= enettx_pkg.vr enetrx_pkg.vr enethub_pkg.vrifeq ($(EXAMPLE_TB), full_duplex)PKG_VR+= rmiirs_pkg.vrendifPKG_VROS= $(PKG_VR:%.vr=%.vro)## Targets## Default target which runs all the steps of initialization, compilation and simulationin a go.all : initial compile_vera compile_vhdl run# Perform the initial tasks before compiling and simulating the testbench.initial : flexm_setup link_dl $(OUT_DIR)/$(FLEXBASE_VROS) $(OUT_DIR)/$(PKG_VROS)220 Synopsys, Inc. October 6, 2003
Simulator Configuration GuideChapter 9: Using VERA with Synopsys Models# re/compile Vera testbench source files.compile_vera : $(OUT_DIR)/$(VERA_OBJ) proj# compile HDL shell files and top VHDL testbench file.compile_vhdl : slm_lib$(VCOM) $(VCOM_OPT) $(VHDL_SRC)# run the simulation. (check the environment and build the required files first).run : check_env ini ./vera.ini ./sim.cmdcp $(SRC_DIR)/*.dat .$(VSIM) -c -do sim.cmd -t ps -lib slm_lib $(DESIGN_UNIT)# copy useful files related to ethernet flexmodels from LMC_HOMEflexm_setup :$(FLEXM_SETUP) -dir ./ enettx_fx$(FLEXM_SETUP) -dir ./ enetrx_fx$(FLEXM_SETUP) -dir ./ enethub_fxifeq ($(EXAMPLE_TB), full_duplex)$(FLEXM_SETUP) -dir ./ rmiirs_fxendif# link together the dynamic library of the FlexModel command corelink_dl : $(OUT_DIR)/vera_user.old -G -z text -o $(OUT_DIR)/vera_mti.dl \${LMC_LIB_DIR}/vera_slm_mti.o \$(OUT_DIR)/vera_user.o \${VERA_HOME}/lib/mti/mti_bridge.a \${VERA_HOME}/lib/libVERA.a -lsocket -lnsl -lintl -lm -lc# compile the table of information about the FlexModel command core$(OUT_DIR)/vera_user.o :@mkdir -p $(OUT_DIR)/d/SUNWspro4/bin/c89 -K pic -c -I${VERA_HOME}/lib${LMC_HOME}/sim/vera/src/vera_user.c \-o $(OUT_DIR)/vera_user.o# compile the flex related vera files$(OUT_DIR)/$(FLEXBASE_VROS) :vera -cmp -q -I${LMC_HOME}/sim/vera/src ${LMC_HOME}/sim/vera/src/$(notdir$(@:.vro=.vr)) $(OUT_DIR)# compile _pkg.vr$(OUT_DIR)/$(PKG_VROS) :vera -cmp -q $(VERA_INC) ./src/vera/$(notdir $(@:.vro=.vr)) $(OUT_DIR)# compile testbench source vera files$(OUT_DIR)/$(VERA_OBJ) :vera -cmp -q -mti $(VERA_INC) $(SRC_DIR)/$(notdir $(@:.vro=.vr)) $(OUT_DIR)# Create Vera shell files for each testbench module listed in the project fileproj :vera -mti -proj $(PROJ_FILE)October 6, 2003 Synopsys, Inc. 221
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Simulator ConfigurationGuide for Sy
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ContentsSimulator Configuration Gui
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ContentsSimulator Configuration Gui
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FiguresSimulator Configuration Guid
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TablesSimulator Configuration Guide
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PrefaceSimulator Configuration Guid
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Chapter 1: Using Synopsys Models wi
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Chapter 2: Using VCS with Synopsys
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Chapter 3: Using ModelSim Verilog w
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Chapter 4: Using ModelSim VHDL with
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Chapter 5: Using NC-Verilog with Sy
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Chapter 6: Using NC-VHDL with Synop
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Chapter 7: Using QuickSim II with S
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Page 268 and 269: Appendix A: Using LMTV with Synopsy
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Appendix A: Using LMTV with Synopsy
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Appendix B: Using Custom Memory Mod
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IndexSimulator Configuration Guide$
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Simulator Configuration Guide for Synopsys Models

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