Simulator Configuration Guide for Synopsys Models

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Chapter 9: Using VERA with Synopsys ModelsSimulator Configuration GuideExample Vera System Testbenches For FlexModelsA number of FlexModels have example Vera system testbenches. Ethernet, USB, andPCI-X models all have Vera testbenches. You will find the example testbenches in thefollowing directories:$LMC_HOME/models/pcimonitor_fx/pcimontior_fxVER/examples/vera$LMC_HOME/models/enethub_fx/enethub_fxVER/examples/vera$LMC_HOME/models/usbhost_fz/usbhost_fzVER/examples/veraThe Ethernet and USB models contain Synopsys provided make files to run thetestbench with various simulators. For PCI-X, the scripts to run the Vera testbench arelisted in the pcimonitor_fx datasheet.The make files in the USB in the Ethernet model directory and pcimonitor_fx datasheetshow how to run the Vera testbenches with the following simulators:●●●●VCSMTI-VerilogMTI-VHDLSciroccoFollowing is a listing of a make file to excute the Ethnernet FlexModel Vear testbenchusing the MTI VHDL simulator.218 Synopsys, Inc. October 6, 2003
Simulator Configuration GuideChapter 9: Using VERA with Synopsys Models################################################################# #### Makefile for compiling the vera_example test benches #### for ethernet flexmodels and running the simulation with #### MTI-VHDL simulator on SOLARIS platform. #### #### Note: This makefile intends to provide just a guideline #### and it is prepared using VERA-5.0 and ModelSim VHDL 5.5c #### for SunOS 5.6. #### Please refer to the latest manuals if needed for the #### correct settings if you are using other versions or #### environment. ################################################################### #### Note : Before compiliing or running simulation with #### this Makefile, following environment variables need #### to be set : #### #### LMC_HOME #### VERA_HOME #### MTI_HOME #### LM_LICENSE_FILE #### LD_LIBRARY_PATH (should include "./vera_out" in this case)#### LMC_LIB_DIR (Set to platform specific library in LMC_HOME;#### $LMC_HOME/lib/sun4Solaris.lib in this case) #### #### path : Add "$VERA_HOME/bin" to $path #### ################################################################### #### Steps to run simulation with this makefile : #### #### "make -f Makefile_mtivhd" (Default target) will run all #### the steps in a go. #### #### To compile and simulate in steps : #### 1. make -f Makefile_mtivhd initial #### 2. make -f Makefile_mtivhd compile_vera #### 3. make -f Makefile_mtivhd compile_vhdl #### 4. make -f Makefile_mtivhd run #### #### To clean the files created during this simulation, one of #### the very_clean, clean and vera_clean targets can be used #### as per the requirement. #### #### Note : By default, the half duplex system example test #### bench is simulated. To simulate full-duplex mode system #### test bench, override EXAMPLE_TB macro from command line #### as EXAMPLE_TB=full_duplex. #### ################################################################### Macros## This macro can be over-ridden as EXAMPLE_TB=full_duplex from# the command line to run the full-duplex mode example.October 6, 2003 Synopsys, Inc. 219
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Simulator ConfigurationGuide for Sy
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FiguresSimulator Configuration Guid
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TablesSimulator Configuration Guide
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PrefaceSimulator Configuration Guid
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Chapter 1: Using Synopsys Models wi
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Chapter 2: Using VCS with Synopsys
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Chapter 3: Using ModelSim Verilog w
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Chapter 4: Using ModelSim VHDL with
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Chapter 5: Using NC-Verilog with Sy
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Chapter 7: Using QuickSim II with S
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Appendix A: Using LMTV with Synopsy
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Appendix B: Using Custom Memory Mod
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IndexSimulator Configuration Guide$
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Simulator Configuration Guide for Synopsys Models

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